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  /external/llvm/test/CodeGen/AArch64/
fp16-v4-instructions.ll 285 %1 = fcmp une <4 x half> %a, %b
308 %1 = fcmp ueq <4 x half> %a, %b
327 %1 = fcmp ugt <4 x half> %a, %b
346 %1 = fcmp uge <4 x half> %a, %b
365 %1 = fcmp ult <4 x half> %a, %b
384 %1 = fcmp ule <4 x half> %a, %b
403 %1 = fcmp uno <4 x half> %a, %b
427 %1 = fcmp one <4 x half> %a, %b
446 %1 = fcmp oeq <4 x half> %a, %b
465 %1 = fcmp ogt <4 x half> %a, %
    [all...]
fp16-v8-instructions.ll 426 %1 = fcmp une <8 x half> %a, %b
432 %1 = fcmp ueq <8 x half> %a, %b
438 %1 = fcmp ugt <8 x half> %a, %b
444 %1 = fcmp uge <8 x half> %a, %b
450 %1 = fcmp ult <8 x half> %a, %b
456 %1 = fcmp ule <8 x half> %a, %b
462 %1 = fcmp uno <8 x half> %a, %b
468 %1 = fcmp one <8 x half> %a, %b
474 %1 = fcmp oeq <8 x half> %a, %b
480 %1 = fcmp ogt <8 x half> %a, %
    [all...]
  /external/clang/test/CodeGen/
ext-vector.c 201 // CHECK: fcmp olt
202 // CHECK: fcmp ole
203 // CHECK: fcmp ogt
204 // CHECK: fcmp oge
205 // CHECK: fcmp oeq
206 // CHECK: fcmp une
  /external/llvm/test/CodeGen/Mips/
fpbr.ll 24 %cmp = fcmp oeq float %f2, %f3
58 %cmp = fcmp olt float %f2, %f3
88 %cmp = fcmp ugt float %f2, %f3
119 %cmp = fcmp oeq double %f2, %f3
149 %cmp = fcmp olt double %f2, %f3
179 %cmp = fcmp ugt double %f2, %f3
hf16call32.ll 78 %cmp = fcmp oeq float %3, %4
89 %cmp3 = fcmp oeq double %8, %9
108 %cmp10 = fcmp oeq float %16, %17
114 %cmp12 = fcmp oeq float %18, %19
135 %cmp17 = fcmp oeq float %27, %28
139 %cmp19 = fcmp oeq double %29, %30
157 %cmp24 = fcmp oeq double %37, %38
161 %cmp26 = fcmp oeq float %39, %40
177 %cmp30 = fcmp oeq double %47, %48
181 %cmp32 = fcmp oeq double %49, %5
    [all...]
  /external/llvm/test/CodeGen/X86/
avx512-cmp.ll 17 %tobool = fcmp une double %a, %b
39 %tobool = fcmp olt float %a, %b
61 %cmp10.i = fcmp oeq float %a, %b
81 %cmp = fcmp oeq float %p, 0.000000e+00
85 %cmp1 = fcmp ogt float %p, 0.000000e+00
114 %0 = fcmp one double %x, %y
machine-combiner.ll 378 %cmp1 = fcmp olt float %x2, %t0
380 %cmp2 = fcmp olt float %x3, %sel1
402 %cmp1 = fcmp ogt float %x2, %t0
404 %cmp2 = fcmp ogt float %x3, %sel1
426 %cmp1 = fcmp olt double %x2, %t0
428 %cmp2 = fcmp olt double %x3, %sel1
450 %cmp1 = fcmp ogt double %x2, %t0
452 %cmp2 = fcmp ogt double %x3, %sel1
474 %cmp1 = fcmp olt <4 x float> %x2, %t0
476 %cmp2 = fcmp olt <4 x float> %x3, %sel
    [all...]
avx512-scalar.ll 77 %cmp_res = fcmp ogt float %i, %j
88 %cmp_res = fcmp ogt float %i, %j
cmovcmov.ll 7 ; One way to do that is with (select (fcmp une/oeq)), which gets
32 %cmp = fcmp oeq float %a, %b
61 %cmp = fcmp oeq float %a, %b
90 %cmp = fcmp une float %a, %b
119 %cmp = fcmp oeq float %a, %b
175 %cmp = fcmp oeq float %a, %b
198 %cmp = fcmp une float %a, %b
220 %cmp = fcmp oeq float %a, %b
  /external/llvm/test/CodeGen/PowerPC/
2008-09-12-CoalescerBug.ll 36 %17 = fcmp olt float %14, 0.000000e+00 ; <i1> [#uses=0]
37 %18 = fcmp olt float %16, 0.000000e+00 ; <i1> [#uses=1]
41 %19 = fcmp ogt float %16, 6.553500e+04 ; <i1> [#uses=1]
75 %44 = fcmp olt float %41, 0.000000e+00 ; <i1> [#uses=0]
76 %45 = fcmp olt float %43, 0.000000e+00 ; <i1> [#uses=1]
80 %46 = fcmp ogt float %43, 6.553500e+04 ; <i1> [#uses=0]
95 %57 = fcmp olt float %54, 0.000000e+00 ; <i1> [#uses=0]
96 %58 = fcmp olt float %56, 0.000000e+00 ; <i1> [#uses=0]
118 %80 = fcmp olt float %77, 0.000000e+00 ; <i1> [#uses=1]
122 %81 = fcmp ogt float %77, 6.553500e+04 ; <i1> [#uses=1
    [all...]
ppc64-toc.ll 39 %cmp = fcmp oeq double %a, 2.000000e+00
52 %cmp = fcmp oeq double %0, %a
  /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
2008-09-12-CoalescerBug.ll 36 %17 = fcmp olt float %14, 0.000000e+00 ; <i1> [#uses=0]
37 %18 = fcmp olt float %16, 0.000000e+00 ; <i1> [#uses=1]
41 %19 = fcmp ogt float %16, 6.553500e+04 ; <i1> [#uses=1]
75 %44 = fcmp olt float %41, 0.000000e+00 ; <i1> [#uses=0]
76 %45 = fcmp olt float %43, 0.000000e+00 ; <i1> [#uses=1]
80 %46 = fcmp ogt float %43, 6.553500e+04 ; <i1> [#uses=0]
95 %57 = fcmp olt float %54, 0.000000e+00 ; <i1> [#uses=0]
96 %58 = fcmp olt float %56, 0.000000e+00 ; <i1> [#uses=0]
118 %80 = fcmp olt float %77, 0.000000e+00 ; <i1> [#uses=1]
122 %81 = fcmp ogt float %77, 6.553500e+04 ; <i1> [#uses=1
    [all...]
  /external/llvm/test/Bitcode/
compatibility-3.6.ll     [all...]
compatibility-3.7.ll     [all...]
  /external/llvm/test/CodeGen/AMDGPU/
selectcc-opt.ll 12 %0 = fcmp olt float %in, 0.000000e+00
40 %0 = fcmp olt float %in, 0.0
  /external/llvm/test/CodeGen/ARM/
ifcvt11.ll 28 %5 = fcmp uge double %3, %4
39 %7 = fcmp uge double %3, %6
  /external/llvm/test/CodeGen/NVPTX/
noduplicate-syncthreads.ll 18 %cmp = fcmp olt double %conv, 1.000000e+01
45 %cmp8 = fcmp olt double %conv7, 1.000000e+01
  /external/llvm/test/Feature/
intrinsics.ll 42 fcmp uno float 1.000000e+00, 2.000000e+00 ; <i1>:1 [#uses=0]
43 fcmp uno double 3.000000e+00, 4.000000e+00 ; <i1>:2 [#uses=0]
  /external/llvm/test/Transforms/CodeGenPrepare/AMDGPU/
no-sink-addrspacecast.ll 16 %tmp7 = fcmp olt float %tmp5, 8.388608e+06
38 %tmp21 = fcmp ogt float %tmp5, 1.600000e+01
  /external/llvm/test/Transforms/InstCombine/
fpcast.ll 45 ; CHECK: fcmp ogt
49 %d = fcmp ogt float %a, %b
  /external/llvm/test/Transforms/LoopVectorize/X86/
imprecise-through-phis.ll 24 %tst = fcmp une double %nextval, 42.0
57 %tst = fcmp fast une double %nextval, 42.0
  /external/llvm/test/Transforms/SimplifyCFG/AArch64/
prefer-fma.ll 9 %cmp = fcmp oeq double %0, 0.000000e+00
37 %cmp2 = fcmp oeq double %5, 2.000000e+00
  /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
ifcvt11.ll 28 %5 = fcmp uge double %3, %4
39 %7 = fcmp uge double %3, %6
  /external/swiftshader/third_party/LLVM/test/CodeGen/CBackend/
2008-10-21-PPCLongDoubleConstant.ll 23 %0 = fcmp ogt ppc_fp128 0xM00000000000000000000000000000000, select (i1 fcmp olt (ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000)), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000), ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128)) ; <i1> [#uses=1]
  /external/swiftshader/third_party/LLVM/test/CodeGen/X86/
cmp.ll 59 %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1]
60 %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1]

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