| /external/llvm/test/CodeGen/AMDGPU/ |
| vselect.ll | 35 %cmp = fcmp une <2 x float> %0, %1
75 %cmp = fcmp une <4 x float> %0, %1
|
| /external/llvm/test/CodeGen/ARM/ |
| debug-info-sreg2.ll | 20 %cmp7 = fcmp olt float %call, %call16, !dbg !12
28 %cmp = fcmp olt float %inc, %call1, !dbg !12
|
| fnegs.ll | 27 %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
54 %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
|
| vceq.ll | 38 %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2
78 %tmp3 = fcmp oeq <4 x float> %tmp1, %tmp2
|
| /external/llvm/test/CodeGen/X86/ |
| cmov-into-branch.ll | 14 %cmp = fcmp olt double %load, %a
28 %cmp = fcmp ogt double %a, %b
|
| fast-isel-select-pseudo-cmov.ll | 13 %1 = fcmp one float %a, %b
24 %1 = fcmp one double %a, %b
|
| machine-cp.ll | 90 %v16 = fcmp olt <16 x float> %x, zeroinitializer
97 %v69 = fcmp ogt <16 x float> %v22, zeroinitializer
|
| pseudo_cmov_lower2.ll | 13 %c1 = fcmp oge float %p1, 0.000000e+00
34 %c1 = fcmp oge float %p1, 0.000000e+00
|
| /external/llvm/test/DebugInfo/ARM/ |
| s-super-register.ll | 17 %cmp7 = fcmp olt float %call, %call16, !dbg !12
25 %cmp = fcmp olt float %inc, %call1, !dbg !12
|
| /external/llvm/test/Transforms/LoopVectorize/AArch64/ |
| interleaved_cost.ll | 61 %2 = fcmp fast olt double %1, %a
65 %6 = fcmp fast olt double %5, %a
|
| /external/llvm/test/Transforms/LoopVectorize/ |
| hoist-loads.ll | 20 %cmp3 = fcmp oeq float %0, 0.000000e+00
52 %cmp3 = fcmp oeq float %0, 0.000000e+00
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| debug-info-sreg2.ll | 19 %cmp7 = fcmp olt float %call, %call16, !dbg !12
27 %cmp = fcmp olt float %inc, %call1, !dbg !12
|
| vceq.ll | 38 %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2
78 %tmp3 = fcmp oeq <4 x float> %tmp1, %tmp2
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| 2008-03-18-CoalescerBug.ll | 18 %tmp35 = fcmp ogt float %tmp28, 1.800000e+01 ; <i1> [#uses=1]
28 %tmp57 = fcmp ugt float 0.000000e+00, %tmp56 ; <i1> [#uses=1]
|
| avx-blend.ll | 90 %max_is_x = fcmp oge <2 x double> %x, %y
99 %min_is_x = fcmp ult <2 x double> %x, %y
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/ |
| encoding_test_fcmp.ll | 27 %cmp = fcmp false float %a, %b
60 %cmp = fcmp false double %a, %b
93 %cmp = fcmp oeq float %a, %b
138 %cmp = fcmp oeq double %a, %b
183 %cmp = fcmp ogt float %a, %b
228 %cmp = fcmp ogt double %a, %b
273 %cmp = fcmp oge float %a, %b
318 %cmp = fcmp oge double %a, %b
363 %cmp = fcmp olt float %a, %b
408 %cmp = fcmp olt double %a, %
[all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-fp-encoding.s | 188 fcmp h1, h2
189 fcmp s1, s2
190 fcmp d1, d2
191 fcmp h1, #0.0
192 fcmp s1, #0.0
193 fcmp d1, #0.0
201 ; FP16: fcmp h1, h2 ; encoding: [0x20,0x20,0xe2,0x1e]
203 ; NO-FP16-NEXT: fcmp h1, h2
204 ; CHECK: fcmp s1, s2 ; encoding: [0x20,0x20,0x22,0x1e]
205 ; CHECK: fcmp d1, d2 ; encoding: [0x20,0x20,0x62,0x1e
[all...] |
| /external/llvm/test/Transforms/Float2Int/ |
| basic.ll | 51 %3 = fcmp ult float %1, %2
194 ; CHECK: %3 = fcmp false float %1, %2
200 %3 = fcmp false float %1, %2
245 ; CHECK: fcmp
250 %3 = fcmp olt double %2, 0.000000e+00
|
| /external/llvm/unittests/IR/ |
| IRBuilderTest.cpp | 134 Instruction *FDiv, *FAdd, *FCmp, *FCall;
195 FCmp = cast<Instruction>(FC);
196 EXPECT_FALSE(FCmp->hasAllowReciprocal());
206 FCmp = cast<Instruction>(FC);
207 EXPECT_TRUE(FCmp->hasAllowReciprocal());
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| ia64-ic.tbl | 8 fcmp-s0; fcmp[Field(sf)==s0]
9 fcmp-s1; fcmp[Field(sf)==s1]
10 fcmp-s2; fcmp[Field(sf)==s2]
11 fcmp-s3; fcmp[Field(sf)==s3]
222 pr-gen-writers-fp; fclass, fcmp
228 pr-readers-nobr-nomovpr; add, addl, addp4, adds, and, andcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, clz, IC:czx, dep, extr, IC:fp-arith, IC:fp-non-arith, fc, fchkf, fclrf, fcmp, IC:fetchadd, fpcmp, fsetc, fwb, getf, hint.f, hint.i, hint.m, hint.x, IC:invala-all, itc.i, itc.d (…)
[all...] |
| microblaze-opc.h | 262 {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
263 {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
264 {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
265 {"fcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000240, OPCODE_MASK_H4, fcmp_gt, arithmetic_inst },
266 {"fcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000250, OPCODE_MASK_H4, fcmp_ne, arithmetic_inst },
267 {"fcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000260, OPCODE_MASK_H4, fcmp_ge, arithmetic_inst },
268 {"fcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000200, OPCODE_MASK_H4, fcmp_un, arithmetic_inst },
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 109 /// getFCmpCode - Similar to getICmpCode but for FCmpInst. This encodes a fcmp
132 llvm_unreachable("Unexpected FCmp predicate!");
161 /// opcode and two operands into either a FCmp instruction. isordered is passed
162 /// in to determine which kind of predicate to use in the new fcmp instruction.
168 default: assert(0 && "Illegal FCmp code!");
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Float2Int.cpp | 37 // float to the int domain: fptoui, fptosi and fcmp. Walk up the def-use
80 // Given a FCmp predicate, return a matching ICmp predicate if one
130 case Instruction::FCmp:
216 case Instruction::FCmp:
284 case Instruction::FCmp:
286 assert(Ops.size() == 2 && "FCmp is a binary operator!");
469 case Instruction::FCmp: {
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64-f128.ll | 480 %cmp = fcmp olt fp128 %a, %b
490 %cmp = fcmp ole fp128 %a, %b
500 %cmp = fcmp ogt fp128 %a, %b
510 %cmp = fcmp oge fp128 %a, %b
520 %cmp = fcmp oeq fp128 %a, %b
530 %cmp = fcmp une fp128 %a, %b
674 %cmp = fcmp ogt fp128 %a, %b
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeInstrFPU.td | 114 def FCMP_UN : CmpFN<0x16, 0x200, "fcmp.un", IIC_FPUc>;
115 def FCMP_LT : CmpFN<0x16, 0x210, "fcmp.lt", IIC_FPUc>;
116 def FCMP_EQ : CmpFN<0x16, 0x220, "fcmp.eq", IIC_FPUc>;
117 def FCMP_LE : CmpFN<0x16, 0x230, "fcmp.le", IIC_FPUc>;
118 def FCMP_GT : CmpFN<0x16, 0x240, "fcmp.gt", IIC_FPUc>;
119 def FCMP_NE : CmpFN<0x16, 0x250, "fcmp.ne", IIC_FPUc>;
120 def FCMP_GE : CmpFN<0x16, 0x260, "fcmp.ge", IIC_FPUc>;
|
