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  /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm-c/
Disassembler.h 222 /* The option to print immediates as hex. */
  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm-c/
Disassembler.h 222 /* The option to print immediates as hex. */
  /prebuilts/go/darwin-x86/src/cmd/internal/objabi/
reloctype.go 39 // immediates in the low half of the instruction word), usually addis followed by
  /prebuilts/go/linux-x86/src/cmd/internal/objabi/
reloctype.go 39 // immediates in the low half of the instruction word), usually addis followed by
  /external/llvm/lib/Target/Mips/
MipsInstrInfo.td 458 // * Wider immediates are a superset of narrower immediates:
460 // * For the same bit-width, unsigned immediates are a superset of signed
461 // immediates::
463 // * For the same upper-bound, signed immediates are a superset of unsigned
464 // immediates:
466 // * Modified immediates are a superset of ordinary immediates:
470 // * 'Relaxed' immediates are supersets of the corresponding unsigned immediate.
    [all...]
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyCFGStackify.cpp 475 // Now rewrite references to basic blocks to be depth immediates.
499 // Rewrite MBB operands to be depth immediates.
  /external/llvm/lib/Transforms/Scalar/
ConstantHoisting.cpp 318 // solutions. Suppose immediates in the range of 0..35 are most optimally
326 // immediates are out of range. It has quadratic complexity, so we call this
  /external/llvm/test/CodeGen/X86/
movtopush.ll 67 ; Checks that we generate the right pushes for >8bit immediates
171 ; aren't exactly immediates) isn't broken.
  /external/mesa3d/src/gallium/drivers/freedreno/ir3/
ir3_cp.c 282 if (ctx->so->immediates[idx].val[swiz] == reg->uim_val) {
291 ctx->so->immediates[idx].val[swiz] = reg->uim_val;
  /external/mesa3d/src/gallium/drivers/r300/
r300_fs.c 283 /* Emit immediates. */
393 /* Emit immediates. */
  /external/mesa3d/src/mesa/state_tracker/
st_atifs_to_tgsi.c 467 /* Emit constants and immediates. Mesa uses a single index space
679 /* add immediates for clamp */
st_mesa_to_tgsi.c 969 /* Emit constants and immediates. Mesa uses a single index space
987 /* Emit immediates only when there's no indirect addressing of
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
X86Disassembler.cpp 195 // By default sign-extend all X86 immediates based on their encoding.
538 insn.immediates[insn.numImmediatesTranslated++],
  /external/swiftshader/third_party/LLVM/lib/Target/X86/
X86InstrFragmentsSIMD.td 358 // BYTE_imm - Transform bit immediates into byte immediates.
  /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
AddrModeMatcher.cpp 312 // Fold in immediates if legal for the target.
522 // folded immediates).
  /toolchain/binutils/binutils-2.27/include/
xtensa-isa.h 554 operands and non-PC-relative immediates, 1 for PC-relative
555 immediates, and XTENSA_UNDEFINED on error. */
  /external/mesa3d/src/gallium/auxiliary/gallivm/
lp_bld_tgsi_soa.c     [all...]
  /external/vixl/src/aarch64/
macro-assembler-aarch64.cc 423 // Immediates on Aarch64 can be produced using an initial value, and zero to
831 // Special cases for all set or all clear immediates.
924 // Call the macro assembler for generic immediates.
    [all...]
  /external/llvm/lib/Target/ARM/
README.txt 11 * Implement smarter constant generation for binops with large immediates.
313 Implement support for some more tricky ways to materialize immediates. For
560 It might be profitable to cse MOVi16 if there are lots of 32-bit immediates
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
README.txt 11 * Implement smarter constant generation for binops with large immediates.
313 Implement support for some more tricky ways to materialize immediates. For
565 It might be profitable to cse MOVi16 if there are lots of 32-bit immediates
  /external/freetype/src/cid/
cidload.c 372 /* look for immediates */
  /external/llvm/lib/Analysis/
PHITransAddr.cpp 266 // If the PHI translated LHS is an add of a constant, fold the immediates.
  /external/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 256 // and therefore we accept immediates and literals here as well
  /external/llvm/lib/Target/AMDGPU/
SIFixSGPRCopies.cpp 175 // immediates.
SIShrinkInstructions.cpp 299 // Try to use S_MOVK_I32, which will save 4 bytes for small immediates.

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