| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| randomize-pool-immediate-basic.ll | 4 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
8 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
13 ; RUN: -sz-seed=1 -randomize-pool-immediates=pool \
17 ; RUN: -sz-seed=1 -randomize-pool-immediates=pool \
|
| rng.ll | 10 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
24 ; RUN: -randomize-pool-immediates=randomize \
36 ; RUN: -randomize-pool-immediates=randomize \
48 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
60 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
73 ; RUN: -sz-seed=1 -randomize-pool-immediates=randomize \
85 ; RUN: -randomize-pool-immediates=randomize \
|
| return_immediates.ll | 1 ; Simple test that returns various immediates. For fixed-width instruction
2 ; sets, some immediates are more complicated than others.
228 ; Some 32-bit immediates can be inverted, and moved in a single instruction.
290 ; 64-bit immediates.
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| archv6t2-bad.s | 1 @ We do not bother testing simple cases, e.g. immediates where
|
| t16-bad.s | 3 @ caught by fixup processing (e.g. out-of-range immediates).
|
| /external/vixl/doc/ |
| changelog.md | 72 + Generate better code for immediates passed to shift-capable instructions.
102 negative immediates.
103 + Added support for using `movn` when generating immediates.
|
| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| fd2_emit.c | 76 * const reg's used for immediates.. this is a hack to work
106 /* emit shader immediates: */
111 OUT_RING(ring, shader->immediates[i].val[0]);
112 OUT_RING(ring, shader->immediates[i].val[1]);
113 OUT_RING(ring, shader->immediates[i].val[2]);
114 OUT_RING(ring, shader->immediates[i].val[3]);
|
| fd2_program.h | 72 } immediates[64]; member in struct:fd2_shader_stateobj
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| diagnostics.s | 56 @ Out of range 4 and 3 bit immediates on CDP[2]
58 @ Out of range immediates for CDP/CDP2
69 @ Out of range immediates for DBG
107 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
165 @ Out of range immediates and bad shift types for SSAT
204 @ Out of range immediates for SSAT16
|
| thumb2-diagnostics.s | 32 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZOperands.td | 257 // i32 immediates
260 // Immediates for the lower and upper 16 bits of an i32, with the other
270 // Immediates for the lower and upper 16 bits of an i32, with the other
280 // Short immediates
331 // Full 32-bit immediates. we need both signed and unsigned versions
340 // 64-bit immediates
343 // Immediates for 16-bit chunks of an i64, with the other bits of the
361 // Immediates for 16-bit chunks of an i64, with the other bits of the
379 // Immediates for the lower and upper 32 bits of an i64, with the other
389 // Immediates for the lower and upper 32 bits of an i64, with the othe
[all...] |
| SystemZTargetTransformInfo.cpp | 101 // Comparisons against signed 32-bit immediates implemented via cgfi.
104 // Comparisons against unsigned 32-bit immediates implemented via clgfi.
112 // We use algfi/slgfi to add/subtract 32-bit unsigned immediates.
122 // We use msgfi to multiply by 32-bit signed immediates.
|
| /external/llvm/lib/Target/Mips/ |
| MipsAnalyzeImmediate.h | 1 //===-- MipsAnalyzeImmediate.h - Analyze Immediates ------------*- C++ -*--===//
|
| /external/llvm/test/MC/X86/ |
| x86_operands.s | 3 # Immediates
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| TODO | 27 - Replace constants and immediates which are 0,1,-1 or a combination of those with a swizzle.
|
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| x86_operands.s | 3 # Immediates
|
| /external/iproute2/include/ |
| bpf_util.h | 86 /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */
217 /* Conditional jumps against immediates, if (dst_reg 'op' imm32) goto pc + off16 */
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 121 // FP immediates are used only when setting GPRs, so they may be dealt
122 // with like regular immediates from this point on.
|
| /external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| WebAssemblyMCTargetDesc.h | 47 /// 32-bit floating-point immediates.
49 /// 64-bit floating-point immediates.
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyInstrControl.td | 44 // Set TSFlags{0} to 1 to indicate that the variable_ops are immediates.
45 // Set TSFlags{1} to 1 to indicate that the immediates represent labels.
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
| X86ATTInstPrinter.cpp | 76 /// print slightly differently than normal immediates. For example, a $ is not
96 // Print X86 immediates as signed values.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPC.h | 91 /// These values identify relocations on immediates folded
|
| /external/mesa3d/src/gallium/auxiliary/draw/ |
| draw_vs.h | 119 const float (*immediates)[4]; member in struct:draw_vertex_shader
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| nv50_screen.h | 15 /* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
|
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| spu.h | 46 A_P, /* parenthesis, this has to separate regs from immediates */
|
