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Searched
full:instrs
(Results
26 - 50
of
359
) sorted by null
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/external/llvm/test/CodeGen/ARM/
fast-isel-remat-same-constant.ll
6
; This test failed with verify machine
instrs
due to incorrect kill flags on the add instructions
/external/llvm/test/CodeGen/PowerPC/
rlwimi3.ll
3
; RUN: grep "Number of machine
instrs
printed" | grep 12
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
rlwimi3.ll
2
; RUN: grep {Number of machine
instrs
printed} | grep 12
/external/llvm/lib/Transforms/Vectorize/
LoadStoreVectorizer.cpp
125
bool vectorizeInstructions(ArrayRef<Value *>
Instrs
);
401
SmallVector<Instruction *, 16>
Instrs
;
405
Instrs
.push_back(cast<Instruction>(V));
407
Instrs
.push_back(GEP);
411
for (Value *V :
Instrs
) {
595
bool Vectorizer::vectorizeInstructions(ArrayRef<Value *>
Instrs
) {
596
DEBUG(dbgs() << "LSV: Vectorizing " <<
Instrs
.size() << " instructions.\n");
602
for (int i = 0, e =
Instrs
.size(); i < e; ++i) {
608
if (isConsecutiveAccess(
Instrs
[i],
Instrs
[j]))
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
ExecutionDepsFix.h
66
SmallVector<MachineInstr*, 8>
Instrs
;
70
bool isCollapsed() const { return
Instrs
.empty(); }
106
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
ExecutionDepsFix.h
66
SmallVector<MachineInstr*, 8>
Instrs
;
70
bool isCollapsed() const { return
Instrs
.empty(); }
106
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/
ExecutionDepsFix.h
77
SmallVector<MachineInstr*, 8>
Instrs
;
83
bool isCollapsed() const { return
Instrs
.empty(); }
117
Instrs
.clear();
/toolchain/binutils/binutils-2.27/include/elf/
sparc.h
248
#define ELF_SPARC_HWCAP2_FJATHHPC 0x00001000 /* Fujitsu HPC
instrs
*/
249
#define ELF_SPARC_HWCAP2_FJDES 0x00002000 /* Fujitsu DES
instrs
*/
250
#define ELF_SPARC_HWCAP2_FJAES 0x00010000 /* Fujitsu AES
instrs
*/
/external/mesa3d/src/compiler/glsl/
loop_unroll.cpp
176
* (loop (...) ...
instrs
...)
180
* ...
instrs
... ...
instrs
... ...
instrs
...
/external/swiftshader/third_party/LLVM/lib/CodeGen/
ExecutionDepsFix.cpp
64
SmallVector<MachineInstr*, 8>
Instrs
;
68
bool isCollapsed() const { return
Instrs
.empty(); }
99
Instrs
.clear();
243
while (!dv->
Instrs
.empty())
244
TII->setExecutionDomain(dv->
Instrs
.pop_back_val(), domain);
267
A->
Instrs
.append(B->
Instrs
.begin(), B->
Instrs
.end());
424
dv->
Instrs
.push_back(mi);
/external/llvm/lib/Target/AArch64/
AArch64SchedM1.td
228
def : InstRW<[M1WriteB ], (
instrs
Bcc)>;
229
def : InstRW<[M1WriteBL], (
instrs
BL)>;
230
def : InstRW<[M1WriteBLR], (
instrs
BLR)>;
235
def : InstRW<[M1WriteALU1], (
instrs
COPY)>;
250
def : InstRW<[M1WriteFVAR15], (
instrs
FDIVSrr)>;
251
def : InstRW<[M1WriteFVAR23], (
instrs
FDIVDrr)>;
257
def : InstRW<[M1WriteFVAR15], (
instrs
FSQRTSr)>;
258
def : InstRW<[M1WriteFVAR23], (
instrs
FSQRTDr)>;
/external/llvm/lib/Target/AMDGPU/
SISchedule.td
120
def : InstRW<[WriteCopy], (
instrs
COPY)>;
132
def : InstRW<[WriteCopy], (
instrs
COPY)>;
/external/llvm/lib/Transforms/Utils/
DemoteRegToStack.cpp
94
/* empty */; // Don't insert before PHI nodes or landingpad
instrs
.
138
/* empty */; // Don't insert before PHI nodes or landingpad
instrs
.
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsExpandPseudo.cpp
114
///
instrs
into real
instrs
Completed in 2183 milliseconds
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