| /external/vixl/doc/ |
| changelog.md | 56 + Support `ldrsw` for literals.
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-collect-loh.ll | 73 ; LDRSW supports loading from a literal.
81 ; CHECK-NEXT: ldrsw x0, {{\[}}[[LDRGOT_REG]]]
150 ; LDRSW supports loading from a literal.
158 ; CHECK-NEXT: ldrsw x0, {{\[}}[[ADDGOT_REG]], #16]
222 ; LDRSW supports loading from a literal.
228 ; CHECK-NEXT: ldrsw x0, {{\[}}[[ADRP_REG]], _InternalC@PAGEOFF]
|
| fast-isel-int-ext2.ll | 277 ; CHECK: ldrsw x0, [x0, x1]
427 ; CHECK: ldrsw x0, [x0, w1, sxtw]
|
| arm64-register-offset-addressing.ll | 95 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, sxtw]
|
| fast-isel-int-ext.ll | 362 ; CHECK: ldrsw x0, [x0, x1]
482 ; CHECK: ldrsw x0, [x0, w1, sxtw]
|
| arm64-fast-isel-conversion.ll | 112 ; CHECK: ldrsw x3, [sp, #8]
|
| ldst-unsignedimm.ll | 141 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var_32bit]
|
| /external/v8/src/builtins/arm64/ |
| builtins-arm64.cc | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| plan9x.go | 40 case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW:
56 case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW, STR, STRB, STRH, STUR, STURB, STURH, LD1:
146 case LDRSW:
|
| tables.go | 193 LDRSW
662 LDRSW: "LDRSW",
[all...] |
| ext_test.go | 403 pcrelr = regexp.MustCompile(`^((?:.*)?(?:ldr|adrp|adr|cbnz|cbz|ldrsw) (?:x|w|s|d|q)(?:[0-9]+,)) 0x([0-9a-f]+)$`)
404 pcrelrzr = regexp.MustCompile(`^((?:.*)?(?:ldr|adrp|adr|cbnz|cbz|ldrsw) (?:x|w)zr,) 0x([0-9a-f]+)$`)
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| plan9x.go | 40 case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW:
56 case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW, STR, STRB, STRH, STUR, STURB, STURH, LD1:
146 case LDRSW:
|
| tables.go | 193 LDRSW
662 LDRSW: "LDRSW",
[all...] |
| ext_test.go | 403 pcrelr = regexp.MustCompile(`^((?:.*)?(?:ldr|adrp|adr|cbnz|cbz|ldrsw) (?:x|w|s|d|q)(?:[0-9]+,)) 0x([0-9a-f]+)$`)
404 pcrelrzr = regexp.MustCompile(`^((?:.*)?(?:ldr|adrp|adr|cbnz|cbz|ldrsw) (?:x|w)zr,) 0x([0-9a-f]+)$`)
|
| /external/llvm/test/MC/AArch64/ |
| arm64-memory.s | 25 ldrsw x9, [sp, #512]
60 ; CHECK: ldrsw x9, [sp, #512] ; encoding: [0xe9,0x03,0x82,0xb9]
444 ldrsw x9, foo
449 ; CHECK: ldrsw x9, foo ; encoding: [0bAAA01001,A,A,0x98]
613 ldrsw x3, [x10, #10]
614 ldrsw x4, [x11, #-1]
|
| basic-a64-instructions.s | [all...] |
| basic-a64-diagnostics.s | [all...] |
| /art/runtime/interpreter/mterp/arm64/ |
| header.S | 282 ldrsw \reg, [xFP, \vreg, uxtw #2]
|
| /external/v8/src/arm64/ |
| deoptimizer-arm64.cc | 219 __ Ldrsw(x1, MemOperand(x4, Deoptimizer::output_count_offset()));
|
| code-stubs-arm64.cc | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| diagnostic.s | 211 ldst_single_wb_64 ldrsw
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-memory.txt | 28 # CHECK: ldrsw x0, [x1, x0, lsl #2]
35 # CHECK: ldrsw x9, [sp, #512]
544 # CHECK: ldrsw x0, [x1, x0, lsl #2]
|
| /external/vixl/doc/aarch64/ |
| supported-instructions-aarch64.md | 630 ### LDRSW ###
634 void ldrsw(const Register& xt, RawLiteral* literal)
637 ### LDRSW ###
641 void ldrsw(const Register& xt, int64_t imm19)
644 ### LDRSW ###
648 void ldrsw(const Register& xt,
[all...] |
| /external/capstone/suite/MC/AArch64/ |
| basic-a64-instructions.s.cs | [all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | [all...] |
