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  /toolchain/binutils/binutils-2.27/ld/testsuite/ld-mips-elf/
attr-gnu-4-5-ph.d 1 #source: empty.s -mips32r2 -mfpxx
11 private flags = 70001000: \[abi=O32\] \[mips32r2\] \[not 32bitmode\]
15 ISA: MIPS32r2
attr-gnu-4-6-ph.d 1 #source: empty.s -mips32r2 -mfp64
11 private flags = 70001000: \[abi=O32\] \[mips32r2\] \[not 32bitmode\]
15 ISA: MIPS32r2
attr-gnu-4-7-ph.d 1 #source: empty.s -mips32r2 -mfp64 -mno-odd-spreg
11 private flags = 70001000: \[abi=O32\] \[mips32r2\] \[not 32bitmode\]
15 ISA: MIPS32r2
attr-gnu-4-44.d 8 Tag_GNU_MIPS_ABI_FP: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
16 FP ABI: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
attr-gnu-4-45.d 1 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mips32r2 -mfp64 \(12 callee-saved\) \(set by .*\), .* uses -mfpxx\n
attr-gnu-4-46.d 1 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mips32r2 -mfp64 \(12 callee-saved\) \(set by .*\), .* uses -mgp32 -mfp64\n
attr-gnu-4-47.d 1 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mips32r2 -mfp64 \(12 callee-saved\) \(set by .*\), .* uses -mgp32 -mfp64 -mno-odd-spreg\n
attr-gnu-4-54.d 2 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mfpxx \(set by .*\), .* uses -mips32r2 -mfp64 \(12 callee-saved\)\n
attr-gnu-4-64.d 2 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mgp32 -mfp64 \(set by .*\), .* uses -mips32r2 -mfp64 \(12 callee-saved\)\n
attr-gnu-4-74.d 2 #source: attr-gnu-4-4.s -W -mips32r2
5 #error: [^\n]*: Warning: .* uses -mgp32 -mfp64 -mno-odd-spreg \(set by .*\), .* uses -mips32r2 -mfp64 \(12 callee-saved\)\n
attr-gnu-4-52.d 2 #source: attr-gnu-4-2.s -mips32r2
attr-gnu-4-53.d 2 #source: attr-gnu-4-3.s -mips32r2
  /external/llvm/test/CodeGen/Mips/llvm-ir/
sqrt.ll 1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
2 ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/
ase-errors-3.s 2 .set mips32r2
12 .set mips32r2
21 .set mips32r2
28 .set mips32r2
33 .set mips32r2
38 .set mips32r2
48 .set mips32r2
57 .set mips32r2
micromips@mips32r2-cp2.d 2 #name: MIPS MIPS32r2 cop2 instructions
5 # Check MIPS32 Release 2 (mips32r2) cop2 instruction assembly (microMIPS).
module-mfp64-noodd.d 1 #as: -mips32r2 -32
11 ISA: MIPS32r2
module-mfp64.d 1 #as: -mips32r2 -32
11 ISA: MIPS32r2
mips32r2-fp32.s 1 # source file to test assembly of mips32r2 FP instructions
mips32r3@isa-override-1.d 5 #dump: mips32r2@isa-override-1.d
mips32r5@isa-override-1.d 5 #dump: mips32r2@isa-override-1.d
mips32r6@isa-override-1.d 5 #dump: mips32r2@isa-override-1.d
  /external/llvm/test/CodeGen/Mips/Fast-ISel/
simplestorefp1.ll 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
5 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
6 ; RUN: < %s | FileCheck %s -check-prefix=mips32r2
33 ; mips32r2: lui $[[REG1a:[0-9]+]], 16371
34 ; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
35 ; mips32r2: lui $[[REG1b:[0-9]+]], 21403
36 ; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
37 ; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
38 ; mips32r2: mthc1 $[[REG2a]], $f[[REG3]]
39 ; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}}
    [all...]
  /external/llvm/test/CodeGen/Mips/
interrupt-attr-args-error.ll 1 ; RUN: not llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t
interrupt-attr-error.ll 4 ; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets.
micromips-compact-jump.ll 1 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \

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