| /external/llvm/test/CodeGen/ARM/ |
| available_externally.ll | 14 ; CHECK-NEXT: .indirect_symbol _A
15 ; CHECK-NEXT: .long 0
17 ; CHECK-NEXT: .indirect_symbol _B
18 ; CHECK-NEXT: .long 0
|
| emit-big-cst.ll | 5 ; CHECK-NEXT: .long 1694510592
6 ; CHECK-NEXT: .long 2960197
7 ; CHECK-NEXT: .long 26220
8 ; CHECK-NEXT: .size bigCst, 12
|
| /external/llvm/test/CodeGen/NVPTX/ |
| sched2.ll | 6 ; CHECK-NEXT: ld.v2.u32
7 ; CHECK-NEXT: ld.v2.u32
8 ; CHECK-NEXT: ld.v2.u32
9 ; CHECK-NEXT: add.s32
10 ; CHECK-NEXT: add.s32
11 ; CHECK-NEXT: add.s32
12 ; CHECK-NEXT: add.s32
13 ; CHECK-NEXT: add.s32
14 ; CHECK-NEXT: add.s32
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppc64le-localentry.ll | 19 ; CHECK-NEXT: .L{{.*}}:
20 ; CHECK-NEXT: .Lfunc_gep[[FN:[0-9]+]]:
21 ; CHECK-NEXT: addis 2, 12, .TOC.-.Lfunc_gep[[FN]]@ha
22 ; CHECK-NEXT: addi 2, 2, .TOC.-.Lfunc_gep[[FN]]@l
23 ; CHECK-NEXT: .Lfunc_lep[[FN]]:
24 ; CHECK-NEXT: .localentry use_toc, .Lfunc_lep[[FN]]-.Lfunc_gep[[FN]]
25 ; CHECK-NEXT: %entry
36 ; CHECK-NEXT: .L{{.*}}:
37 ; CHECK-NEXT: .Lfunc_gep[[FN:[0-9]+]]:
38 ; CHECK-NEXT: addis 2, 12, .TOC.-.Lfunc_gep[[FN]]@h
[all...] |
| /external/llvm/test/CodeGen/WebAssembly/ |
| load.ll | 10 ; CHECK-NEXT: .param i32{{$}}
11 ; CHECK-NEXT: .result i32{{$}}
12 ; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
13 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
20 ; CHECK-NEXT: .param i32{{$}}
21 ; CHECK-NEXT: .result i64{{$}}
22 ; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
23 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
30 ; CHECK-NEXT: .param i32{{$}}
31 ; CHECK-NEXT: .result f32{{$}
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2012-1-10-buildvector.ll | 7 ; CHECK-NEXT: vxorps %ymm0, %ymm0, %ymm0
8 ; CHECK-NEXT: vmovaps %xmm0, (%eax)
9 ; CHECK-NEXT: movl $0, (%eax)
10 ; CHECK-NEXT: vzeroupper
11 ; CHECK-NEXT: retl
21 ; CHECK-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
22 ; CHECK-NEXT: vmovaps %ymm0, (%eax)
23 ; CHECK-NEXT: vzeroupper
24 ; CHECK-NEXT: retl
|
| avx-cvt.ll | 7 ; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
8 ; CHECK-NEXT: retq
16 ; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
17 ; CHECK-NEXT: retq
25 ; CHECK-NEXT: vcvtdq2pd %xmm0, %ymm0
26 ; CHECK-NEXT: retq
34 ; CHECK-NEXT: vpmovsxwd %xmm0, %xmm1
35 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
36 ; CHECK-NEXT: vpmovsxwd %xmm0, %xmm0
37 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm
[all...] |
| cmov-into-branch.ll | 8 ; CHECK-NEXT: ucomisd (%rdi), %xmm0
9 ; CHECK-NEXT: cmovbel %edx, %esi
10 ; CHECK-NEXT: movl %esi, %eax
11 ; CHECK-NEXT: retq
23 ; CHECK-NEXT: ucomisd %xmm1, %xmm0
24 ; CHECK-NEXT: cmovbel %esi, %edi
25 ; CHECK-NEXT: movl %edi, %eax
26 ; CHECK-NEXT: retq
37 ; CHECK-NEXT: movl (%rsi), %eax
38 ; CHECK-NEXT: cmpl %edi, %ea
[all...] |
| copysign-constant-magnitude.ll | 8 ; CHECK-NEXT: .quad -9223372036854775808 ## double -0
9 ; CHECK-NEXT: .quad 0 ## double 0
11 ; CHECK-NEXT: .space 16
13 ; CHECK-NEXT: .quad 4607182418800017408 ## double 1
14 ; CHECK-NEXT: .quad 0 ## double 0
20 ; CHECK-NEXT: andpd [[SIGNMASK]](%rip), %xmm0
23 ; CHECK-NEXT: id
26 ; CHECK-NEXT: andpd [[SIGNMASK]](%rip), %xmm0
27 ; CHECK-NEXT: orpd [[ZERO]](%rip), %xmm0
30 ; CHECK-NEXT: i
[all...] |
| ctpop-combine.ll | 9 ; CHECK-NEXT: leaq -1(%rdi), %rcx
10 ; CHECK-NEXT: xorl %eax, %eax
11 ; CHECK-NEXT: testq %rcx, %rdi
12 ; CHECK-NEXT: setne %al
13 ; CHECK-NEXT: retq
25 ; CHECK-NEXT: leaq -1(%rdi), %rcx
26 ; CHECK-NEXT: xorl %eax, %eax
27 ; CHECK-NEXT: testq %rcx, %rdi
28 ; CHECK-NEXT: sete %al
29 ; CHECK-NEXT: ret
[all...] |
| deopt-intrinsic-cconv.ll | 12 ; CHECK-NEXT: {{.+cfi.+}}
13 ; CHECK-NEXT: ##{{.+}}
14 ; CHECK-NEXT: pushq %rax
15 ; CHECK-NEXT: {{Ltmp[0-9]+}}:
16 ; CHECK-NEXT: {{.+cfi.+}}
17 ; CHECK-NEXT: movl $1140457472, (%rsp) ## imm = 0x43FA0000
18 ; CHECK-NEXT: movl $42, %eax
19 ; CHECK-NEXT: callq ___llvm_deoptimize
20 ; CHECK-NEXT: {{Ltmp[0-9]+}}:
28 ; STACKMAPS-NEXT: Stack Maps: callsite 288240001
[all...] |
| elf-comdat2.ll | 8 ; CHECK-NEXT: .section .data.bar,"aGw",@progbits,foo,comdat
9 ; CHECK-NEXT: .globl bar
11 ; CHECK-NEXT: .data
12 ; CHECK-NEXT: .globl foo
|
| logical-load-fold.ll | 15 ; SSE2-NEXT: cmplesd %xmm0, %xmm1
16 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
17 ; SSE2-NEXT: andpd %xmm1, %xmm0
18 ; SSE2-NEXT: retq
22 ; AVX-NEXT: vcmplesd %xmm0, %xmm1, %xmm0
23 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
24 ; AVX-NEXT: vandpd %xmm1, %xmm0, %xmm0
25 ; AVX-NEXT: retq
36 ; SSE2-NEXT: cmpless %xmm0, %xmm1
37 ; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zer
[all...] |
| machine-combiner-int-vec.ll | 9 ; SSE-NEXT: paddd %xmm1, %xmm0
10 ; SSE-NEXT: pand %xmm3, %xmm2
11 ; SSE-NEXT: pand %xmm2, %xmm0
12 ; SSE-NEXT: retq
16 ; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
17 ; AVX-NEXT: vpand %xmm3, %xmm2, %xmm1
18 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
19 ; AVX-NEXT: retq
30 ; SSE-NEXT: paddd %xmm1, %xmm0
31 ; SSE-NEXT: por %xmm3, %xmm
[all...] |
| machine-combiner-int.ll | 13 ; CHECK-NEXT: # kill
14 ; CHECK-NEXT: # kill
15 ; CHECK-NEXT: leal (%rdi,%rsi), %eax
16 ; CHECK-NEXT: imull %ecx, %edx
17 ; CHECK-NEXT: imull %edx, %eax
18 ; CHECK-NEXT: # kill
19 ; CHECK-NEXT: retq
29 ; CHECK-NEXT: # kill
30 ; CHECK-NEXT: # kill
31 ; CHECK-NEXT: leal (%rdi,%rsi), %ea
[all...] |
| mmx-arg-passing.ll | 16 ; X86-32-NEXT: movl L_u1$non_lazy_ptr, %eax
17 ; X86-32-NEXT: movq %mm0, (%eax)
18 ; X86-32-NEXT: retl
22 ; X86-64-NEXT: movdq2q %xmm0, %mm0
23 ; X86-64-NEXT: movq _u1@{{.*}}(%rip), %rax
24 ; X86-64-NEXT: movq %mm0, (%rax)
25 ; X86-64-NEXT: retq
35 ; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
36 ; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
37 ; X86-32-NEXT: movl L_u2$non_lazy_ptr, %ed
[all...] |
| pr11415.ll | 8 ; CHECK-NEXT: #NO_APP
9 ; CHECK-NEXT: movq %rcx, %rax
10 ; CHECK-NEXT: movq %rax, -8(%rsp)
11 ; CHECK-NEXT: movq -8(%rsp), %rdx
12 ; CHECK-NEXT: #APP
13 ; CHECK-NEXT: #NO_APP
14 ; CHECK-NEXT: movq %rdx, %rax
15 ; CHECK-NEXT: movq %rdx, -8(%rsp)
16 ; CHECK-NEXT: ret
|
| setcc-sentinals.ll | 5 ; CHECK-NEXT: incq %[[X:rdi|rcx]]
6 ; CHECK-NEXT: cmpq $1, %[[X]]
7 ; CHECK-NEXT: seta %al
8 ; CHECK-NEXT: ret
|
| sse-intrinsics-x86-upgrade.ll | 8 ; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
9 ; SSE-NEXT: movups %xmm0, (%eax)
10 ; SSE-NEXT: retl
14 ; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
15 ; KNL-NEXT: vmovups %xmm0, (%eax)
16 ; KNL-NEXT: retl
19 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
20 ; CHECK-NEXT: movups %xmm0, (%eax)
21 ; CHECK-NEXT: retl
|
| vec_shift2.ll | 8 ; X32-NEXT: movl $14, %eax
9 ; X32-NEXT: movd %eax, %xmm1
10 ; X32-NEXT: psrlw %xmm1, %xmm0
11 ; X32-NEXT: retl
15 ; X64-NEXT: movl $14, %eax
16 ; X64-NEXT: movd %eax, %xmm1
17 ; X64-NEXT: psrlw %xmm1, %xmm0
18 ; X64-NEXT: retq
28 ; X32-NEXT: movl $14, %eax
29 ; X32-NEXT: movd %eax, %xmm
[all...] |
| vector-lzcnt-512.ll | 8 ; ALL-NEXT: vplzcntq %zmm0, %zmm0
9 ; ALL-NEXT: retq
17 ; ALL-NEXT: vplzcntq %zmm0, %zmm0
18 ; ALL-NEXT: retq
26 ; ALL-NEXT: vplzcntd %zmm0, %zmm0
27 ; ALL-NEXT: retq
35 ; ALL-NEXT: vplzcntd %zmm0, %zmm0
36 ; ALL-NEXT: retq
44 ; AVX512CD-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
45 ; AVX512CD-NEXT: vplzcntd %zmm0, %zmm
[all...] |
| /external/llvm/test/CodeGen/XCore/ |
| licm-ldwcp.ll | 6 ; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
7 ; CHECK-NEXT: .LBB0_1:
8 ; CHECK-NEXT: stw [[REG]], r0[0]
9 ; CHECK-NEXT: bu .LBB0_1
|
| /external/llvm/test/DebugInfo/COFF/ |
| enum.ll | 9 ; CHECK-NEXT: TypeLeafKind: LF_FIELDLIST (0x1203)
10 ; CHECK-NEXT: Enumerator {
11 ; CHECK-NEXT: AccessSpecifier: Public (0x3)
12 ; CHECK-NEXT: EnumValue: 0
13 ; CHECK-NEXT: Name: BLAH
14 ; CHECK-NEXT: }
15 ; CHECK-NEXT: }
16 ; CHECK-NEXT: Enum (0x1001) {
17 ; CHECK-NEXT: TypeLeafKind: LF_ENUM (0x1507)
18 ; CHECK-NEXT: NumEnumerators:
[all...] |
| /external/llvm/test/DebugInfo/ |
| dwarfdump-debug-frame-simple.test | 10 ; FRAMES-NEXT: DW_CFA_offset: reg8 -4
11 ; FRAMES-NEXT: DW_CFA_nop:
12 ; FRAMES-NEXT: DW_CFA_nop:
16 ; FRAMES-NEXT: DW_CFA_def_cfa_offset: +12
17 ; FRAMES-NEXT: DW_CFA_nop:
21 ; FRAMES-NEXT: DW_CFA_def_cfa_offset: +8
22 ; FRAMES-NEXT: DW_CFA_offset: reg5 -8
23 ; FRAMES-NEXT: DW_CFA_advance_loc: 2
24 ; FRAMES-NEXT: DW_CFA_def_cfa_register: reg5
|
| /external/llvm/test/FileCheck/ |
| next-no-match.txt | 7 ; CHECK-NEXT: baz
|
