| /external/llvm/test/Transforms/InstCombine/ |
| icmp.ll | 8 ; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
9 ; CHECK-NEXT: ret i32 [[X_LOBIT]]
18 ; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31
19 ; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], 1
20 ; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]]
29 ; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
30 ; CHECK-NEXT: ret i32 [[X_LOBIT]]
39 ; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31
40 ; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], -1
41 ; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]
[all...] |
| /external/ImageMagick/MagickCore/ |
| linked-list.c | 66 *next;
78 *next;
117 *next;
123 next=(ElementInfo *) AcquireMagickMemory(sizeof(*next));
124 if (next == (ElementInfo *) NULL)
126 next->value=(void *) value;
127 next->next=(ElementInfo *) NULL;
129 if (list_info->next == (ElementInfo *) NULL)
64 *next; member in struct:_ElementInfo
76 *next; member in struct:_LinkedListInfo
114 *next; local
171 *next; local
225 *next; local
385 *next; local
450 *next; local
555 *next; local
669 *next; local
761 *next; local
833 *next; local
921 *next; local
[all...] |
| /dalvik/dx/tests/094-scala-locals/ |
| expected.txt | 9 next 0014
16 next 0015
23 next 0016
30 next 0017
37 next 000e
43 next 0000
49 next 0019
55 next 0003
61 next 0006
67 next 000
[all...] |
| /device/google/marlin/camera/QCamera2/stack/common/ |
| cam_list.h | 44 struct cam_list *next, *prev; member in struct:cam_list
49 ptr->next = ptr;
59 item->next = head;
61 prev->next = item;
67 item->next = node;
69 item->prev->next = item;
76 struct cam_list *next = ptr->next; local
78 next->prev = ptr->prev;
79 prev->next = ptr->next
[all...] |
| /device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Modules/ |
| rotatingtree.c | 66 rotating_node_t *next;
local
75 next = node->left;
76 if (next == NULL)
79 node->left = next->right;
80 next->right = node;
81 *pnode = next;
87 next = node->right;
88 if (next == NULL)
91 node->right = next->left;
92 next->left = node;
[all...] |
| /external/clang/test/ARCMT/ |
| check-with-serialized-diag.m | 43 // CHECK-NEXT: Number FIXITs = 0
44 // CHECK-NEXT: {{.*}}check-with-serialized-diag.m:34:4: error: [rewriter] it is not safe to remove 'retain' message on a global variable
45 // CHECK-NEXT: Number FIXITs = 0
46 // CHECK-NEXT: {{.*}}check-with-serialized-diag.m:32:23: error: ARC forbids explicit message send of 'retain'
47 // CHECK-NEXT: Range: {{.*}}check-with-serialized-diag.m:32:4 {{.*}}check-with-serialized-diag.m:32:22
48 // CHECK-NEXT: Number FIXITs = 0
49 // CHECK-NEXT: {{.*}}check-with-serialized-diag.m:34:15: error: ARC forbids explicit message send of 'retain'
50 // CHECK-NEXT: Range: {{.*}}check-with-serialized-diag.m:34:4 {{.*}}check-with-serialized-diag.m:34:14
51 // CHECK-NEXT: Number FIXITs = 0
52 // CHECK-NEXT: {{.*}}check-with-serialized-diag.m:35:6: error: ARC forbids explicit message send of 'retainCount
[all...] |
| verify.m | 12 // CHECK-NEXT: error: 'error' diagnostics seen but not expected:
13 // CHECK-NEXT: (frontend): error reading '{{.*}}verify.m.tmp.invalid'
14 // CHECK-NEXT: 2 errors generated.
|
| /external/clang/test/CodeGenCXX/ |
| cxx0x-initializer-stdinitializerlist-startend.cpp | 44 // CHECK-NEXT: store i32 1, i32*
45 // CHECK-NEXT: getelementptr
46 // CHECK-NEXT: store
47 // CHECK-NEXT: getelementptr
48 // CHECK-NEXT: load
49 // CHECK-NEXT: store
51 // CHECK-NEXT: getelementptr
52 // CHECK-NEXT: getelementptr inbounds [3 x i32], [3 x i32]*
53 // CHECK-NEXT: store i32*
54 // CHECK-NEXT: getelementpt
[all...] |
| derived-to-base-conv.cpp | 36 // CHECK-NEXT: [[T0:%.*]] = call dereferenceable({{[0-9]+}}) [[B:%.*]]* @_ZN1XcvR1BEv(
37 // CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]* [[T0]] to [[A]]*
38 // CHECK-NEXT: call void @_ZN1AC1ERKS_([[A]]* [[TMP]], [[A]]* dereferenceable({{[0-9]+}}) [[T1]])
39 // CHECK-NEXT: call void @_Z12test0_helper1A([[A]]* [[TMP]])
40 // CHECK-NEXT: call void @_ZN1AD1Ev([[A]]* [[TMP]])
41 // CHECK-NEXT: ret void
80 // CHECK-NEXT: [[Y:%.*]] = alloca [[A:%.*]]*, align 8
81 // CHECK-NEXT: store [[B]]* {{%.*}}, [[B]]** [[X]], align 8
82 // CHECK-NEXT: [[T0:%.*]] = load [[B]]*, [[B]]** [[X]], align 8
83 // CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]* [[T0]] to [[A]]
[all...] |
| exception-spec-decay.cpp | 7 // CHECK-NEXT: filter {{.*}} @_ZTIPi
27 // CHECK-NEXT: filter {{.*}} @_ZTIP1S
32 // CHECK-NEXT: filter {{.*}} @_ZTIPi
|
| /external/clang/test/CodeGenObjC/ |
| fragile-arc.m | 35 // CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]* [[SELF]] to i8*
36 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i32 4
37 // CHECK-NEXT: [[IVAR:%.*]] = bitcast i8* [[T1]] to [[OPAQUE]]**
38 // CHECK-NEXT: [[T0:%.*]] = load [[OPAQUE]]*, [[OPAQUE]]** [[IVAR]]
39 // CHECK-NEXT: [[T1:%.*]] = bitcast [[OPAQUE]]* [[T0]] to i8*
40 // CHECK-NEXT: [[T2:%.*]] = call i8* @objc_retain(i8* [[T1]])
41 // CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[OPAQUE]]*
42 // CHECK-NEXT: store [[OPAQUE]]* [[T3]], [[OPAQUE]]** [[X]]
44 // CHECK-NEXT: [[VALUE:%.*]] = load [[OPAQUE]]*, [[OPAQUE]]** [[X]]
45 // CHECK-NEXT: [[SELF:%.*]] = load [[A]]*, [[A]]** [[SELFVAR]
[all...] |
| /external/clang/test/Rewriter/ |
| no-integrated-preprocessing.m | 24 // CHECK-NEXT: 0, 0, 0,
25 // CHECK-NEXT: 0,
26 // CHECK-NEXT: "MYINTF",
|
| /external/llvm/test/Analysis/GlobalsModRef/ |
| modreftest.ll | 7 ; CHECK-NEXT: store i32 12, i32* @X
8 ; CHECK-NEXT: call void @doesnotmodX()
9 ; CHECK-NEXT: ret i32 12
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| 2008-02-11-ReversedCondition.ll | 9 %i = phi i32 [ 0, %entry ], [ %i.inc, %next ]
11 br i1 %cond, label %next, label %return
12 next:
|
| 2008-02-12-SMAXTripCount.ll | 9 %i = phi i8 [ -100, %entry ], [ %i.inc, %next ]
11 br i1 %cond, label %next, label %return
12 next:
|
| 2008-02-15-UMax.ll | 10 %i = phi i32 [ 100, %entry ], [ %i.inc, %next ]
12 br i1 %cond, label %next, label %return
13 next:
|
| 2008-07-19-InfiniteLoop.ll | 10 %i = phi i8 [ 0, %entry ], [ %i.next, %loop ]
11 %i.next = add i8 %i, 4
12 %cond = icmp ne i8 %i.next, 6
|
| 2008-07-19-WrappingIV.ll | 10 %i = phi i8 [ 0, %entry ], [ %i.next, %loop ]
11 %i.next = add i8 %i, 18
12 %cond = icmp ne i8 %i.next, 4
|
| /external/llvm/test/Assembler/ |
| insertextractvalue.ll | 5 ; CHECK-NEXT: load
6 ; CHECK-NEXT: extractvalue
7 ; CHECK-NEXT: insertvalue
8 ; CHECK-NEXT: store
9 ; CHECK-NEXT: ret
19 ; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } { i32 4 }, { float, double } { float 4.000000e+00, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p
20 ; CHECK-NEXT: ret float 7.000000e+00
27 ; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } undef, { float, double } { float undef, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p
28 ; CHECK-NEXT: ret float undef
35 ; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } zeroinitializer, { float, double } { float 0.00000 (…)
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-coalescing-MOVi32imm.ll | 4 ; CHECK-NEXT: bl foo
5 ; CHECK-NEXT: orr w0, wzr, #0x1
6 ; CHECK-NEXT: bl foo
|
| fast-isel-sdiv.ll | 14 ; CHECK-NEXT: cmp w0, #0
15 ; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
16 ; CHECK-NEXT: asr {{w[0-9]+}}, [[REG2]], #3
24 ; CHECK-NEXT: cmp w0, #0
25 ; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt
26 ; CHECK-NEXT: neg {{w[0-9]+}}, [[REG2]], asr #3
41 ; CHECK-NEXT: cmp x0, #0
42 ; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt
43 ; CHECK-NEXT: asr {{x[0-9]+}}, [[REG2]], #4
51 ; CHECK-NEXT: cmp x0, #
[all...] |
| /external/llvm/test/CodeGen/AMDGPU/ |
| llvm.amdgcn.buffer.wbinvl1.sc.ll | 6 ; SI-NEXT: ; BB#0:
7 ; SI-NEXT: buffer_wbinvl1_sc ; encoding: [0x00,0x00,0xc0,0xe1,0x00,0x00,0x00,0x00]
8 ; SI-NEXT: s_endpgm
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-12-07-PEIBug.ll | 8 ; CHECK-NEXT: vpush {d10, d11}
9 ; CHECK-NEXT: vpush {d8}
12 ; CHECK-NEXT: vpop {d10, d11}
|
| crc32.ll | 3 define i32 @test_crc32b(i32 %cur, i8 %next) {
6 %bits = zext i8 %next to i32
11 define i32 @test_crc32h(i32 %cur, i16 %next) {
14 %bits = zext i16 %next to i32
19 define i32 @test_crc32w(i32 %cur, i32 %next) {
22 %val = call i32 @llvm.arm.crc32w(i32 %cur, i32 %next)
26 define i32 @test_crc32cb(i32 %cur, i8 %next) {
29 %bits = zext i8 %next to i32
34 define i32 @test_crc32ch(i32 %cur, i16 %next) {
37 %bits = zext i16 %next to i3
[all...] |
| pie.ll | 12 ; CHECK-NEXT: .L{{.*}}:
13 ; CHECK-NEXT: add r0, pc, r0
14 ; CHECK-NEXT: bx lr
|
