/external/adhd/cras/src/common/ |
utlist.h | 38 * To use singly-linked lists, your structure must have a "next" pointer. 39 * To use doubly-linked lists, your structure must "prev" and "next" pointers. 45 * struct item *prev, *next; 66 (add)->next = head; \ 75 while (_tmp->next) \ 76 _tmp = _tmp->next; \ 77 _tmp->next = (head2); \ 85 (add)->next = NULL; \ 88 while (_tmp->next) \ 89 _tmp = _tmp->next; \ [all...] |
/external/clang/test/CodeGenCXX/ |
blocks.cpp | 124 // CHECK-NEXT: store i8* [[BLOCKDESC:%.*]], i8** {{.*}}, align 8 125 // CHECK-NEXT: load i8*, i8** 126 // CHECK-NEXT: bitcast i8* [[BLOCKDESC]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 128 // CHECK-NEXT: call void @_ZN5test43fooENS_1AE([[A]]* [[TMP]]) 129 // CHECK-NEXT: call void @_ZN5test41AD1Ev([[A]]* [[TMP]]) 130 // CHECK-NEXT: ret void 152 // CHECK-NEXT: [[X:%.*]] = alloca [[A:%.*]], align 4 153 // CHECK-NEXT: [[B:%.*]] = alloca void ()*, align 8 154 // CHECK-NEXT: [[BLOCK:%.*]] = alloca [[BLOCK_T:.*]], align 8 155 // CHECK-NEXT: [[CLEANUP_ACTIVE:%.*]] = alloca i [all...] |
delete.cpp | 25 // CHECK-NEXT: bitcast 26 // CHECK-NEXT: call void @_ZdlPv 52 // CHECK-NEXT: bitcast 53 // CHECK-NEXT: call void @_ZN5test01AdlEPv 71 // CHECK-NEXT: br i1 74 // CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]* [[BEGIN]] to i8* 75 // CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 -8 76 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[ALLOC]] to i64* 77 // CHECK-NEXT: [[COUNT:%.*]] = load i64, i64* [[T1]] 79 // CHECK-NEXT: [[ISEMPTY:%.*]] = icmp eq [[A]]* [[BEGIN]], [[END] [all...] |
/external/clang/test/Frontend/ |
verify.c | 52 // CHECK2-NEXT: Line 41: define_error 53 // CHECK2-NEXT: Line 43: line_error 54 // CHECK2-NEXT: error: 'error' diagnostics seen but not expected: 55 // CHECK2-NEXT: Line 43: #line directive requires a positive integer argument 56 // CHECK2-NEXT: Line 44: AAA // expected-error {{[{][{]BBB[}][}]}} <- this shall be part of diagnostic 57 // CHECK2-NEXT: error: 'warning' diagnostics expected but not seen: 58 // CHECK2-NEXT: Line 42: undef_error 59 // CHECK2-NEXT: error: 'warning' diagnostics seen but not expected: 60 // CHECK2-NEXT: Line 42: extra tokens at end of #undef directive 61 // CHECK2-NEXT: Line 45: CCC // expected-warning {{[{][{]DDD[}][}]}} <- this shall be part of diagnosti [all...] |
/external/clang/test/Index/ |
index-module.m | 16 // CHECK-NEXT: [importedASTFile]: [[PCM:.*[/\\]DependsOnModule\.pcm]] | loc: 2:1 | name: "DependsOnModule" | isImplicit: 1 19 // CHECK-NEXT: [indexDeclaration]: kind: variable | name: glob | {{.*}} | loc: 4:5 26 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_MODULE_H:.*/Modules/Inputs/DependsOnModule\.framework[/\\]Headers[/\\]DependsOnModule\.h]] | {{.*}} | hash loc: <invalid> | {{.*}} | module: DependsOnModule 27 // CHECK-DMOD-NEXT: [ppIncludedFile]: {{.*}}/Modules/Inputs/Module.framework{{[/\\]}}Headers{{[/\\]}}Module.h | name: "Module/Module.h" | hash loc: {{.*}}/Modules/Inputs/DependsOnModule.framework{{[/\\]}}Headers{{[/\\]}}DependsOnModule.h:1:1 | isImport: 0 | isAngled: 1 | isModule: 1 | module: Module 28 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_OTHER_H:.*/Modules/Inputs/DependsOnModule\.framework[/\\]Headers[/\\]other\.h]] | {{.*}} | hash loc: <invalid> | {{.*}} | module: DependsOnModule 29 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_NOT_CXX_H:.*/Modules/Inputs/DependsOnModule\.framework[/\\]Headers[/\\]not_cxx\.h]] | {{.*}} | hash loc: <invalid> | {{.*}} | module: DependsOnModule.NotCXX 30 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_SUB_H:.*/Modules/Inputs/DependsOnModule\.framework[/\\]Frameworks[/\\]SubFramework\.framework[/\\]Headers[/\\]SubFramework\.h]] | {{.*}} | hash loc: <invalid> | {{.*}} | module: DependsOnModule.SubFramework 31 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_SUB_OTHER_H:.*/Modules/Inputs/DependsOnModule.framework[/\\]Frameworks/SubFramework\.framework/Headers/Other\.h]] | name: "SubFramework/Other.h" | hash loc: [[DMOD_SUB_H]]:1:1 | isImport: 0 | isAngled: 0 | isModule: 0 | module: DependsOnModule.SubFramework.Other 32 // CHECK-DMOD-NEXT: [ppIncludedFile]: [[DMOD_PRIVATE_H:.*/Modules/Inputs/DependsOnModule.framework[/\\]PrivateHeaders[/\\]DependsOnModulePrivate.h]] | {{.*}} | hash loc: <invalid> | {{.*}} | module: DependsOnModule.Private.DependsOnModule 33 // CHECK-DMOD-NEXT: [importedASTFile]: {{.*}}.cache{{(.sys)?[/\\]}}Module.pcm | loc: [[DMOD_MODULE_H]]:1:1 | name: "M (…) [all...] |
/external/clang/test/OpenMP/ |
for_simd_ast_print.cpp | 69 // CHECK-NEXT: #pragma omp for simd private(myind,g_ind) linear(ind) aligned(arr) ordered 90 // CHECK-NEXT: #pragma omp for simd private(val) safelen(7) linear(lin: -5) lastprivate(res) simdlen(5) 99 // CHECK-NEXT: #pragma omp for simd safelen(clen - 1) simdlen(clen - 1) 101 // CHECK-NEXT: for (T i = clen + 2; i < 20; ++i) { 103 // CHECK-NEXT: v[i] = v[v - clen] + 1; 105 // CHECK-NEXT: } 129 // CHECK-NEXT: static void func(int n, float *a, float *b, float *c) { 130 // CHECK-NEXT: int k1 = 0, k2 = 0; 131 // CHECK-NEXT: #pragma omp for simd safelen(4) linear(k1,k2: 4) aligned(a: 4) simdlen(4) 132 // CHECK-NEXT: for (int i = 0; i < n; i++) [all...] |
parallel_for_simd_ast_print.cpp | 70 // CHECK-NEXT: #pragma omp parallel for simd private(myind,g_ind) linear(ind) aligned(arr) if(parallel: num) 91 // CHECK-NEXT: #pragma omp parallel for simd private(val) safelen(7) linear(lin: -5) lastprivate(res) simdlen(5) if(7) 100 // CHECK-NEXT: #pragma omp parallel for simd safelen(clen - 1) simdlen(clen - 1) ordered 102 // CHECK-NEXT: for (T i = clen + 2; i < 20; ++i) { 104 // CHECK-NEXT: v[i] = v[v - clen] + 1; 106 // CHECK-NEXT: } 130 // CHECK-NEXT: static void func(int n, float *a, float *b, float *c) { 131 // CHECK-NEXT: int k1 = 0, k2 = 0; 132 // CHECK-NEXT: #pragma omp parallel for simd safelen(4) linear(k1,k2: 4) aligned(a: 4) simdlen(4) 133 // CHECK-NEXT: for (int i = 0; i < n; i++) [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-fast-isel-icmp.ll | 7 ; CHECK-NEXT: cset w0, eq 17 ; CHECK-NEXT: cset w0, eq 27 ; CHECK-NEXT: cset w0, eq 37 ; CHECK-NEXT: cset w0, ne 47 ; CHECK-NEXT: cset {{.+}}, eq 57 ; CHECK-NEXT: cset {{.+}}, ne 67 ; CHECK-NEXT: cset w0, hi 77 ; CHECK-NEXT: cset w0, hs 87 ; CHECK-NEXT: cset w0, lo 97 ; CHECK-NEXT: cset w0, l [all...] |
/external/llvm/test/CodeGen/X86/ |
sse_partial_update.ll | 14 ; CHECK-NEXT: rsqrtss %xmm0, %xmm0 15 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm2 16 ; CHECK-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3] 17 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm1 18 ; CHECK-NEXT: movaps %xmm2, %xmm0 19 ; CHECK-NEXT: jmp _callee ## TAILCALL 36 ; CHECK-NEXT: rcpss %xmm0, %xmm0 37 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm2 38 ; CHECK-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3] 39 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm [all...] |
vec_ss_load_fold.ll | 9 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 10 ; CHECK-NEXT: xorps %xmm1, %xmm1 11 ; CHECK-NEXT: subss LCPI0_0, %xmm0 12 ; CHECK-NEXT: mulss LCPI0_1, %xmm0 13 ; CHECK-NEXT: minss LCPI0_2, %xmm0 14 ; CHECK-NEXT: maxss %xmm1, %xmm0 15 ; CHECK-NEXT: cvttss2si %xmm0, %eax 16 ; CHECK-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill> 17 ; CHECK-NEXT: retl 35 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zer [all...] |
avx-cast.ll | 12 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def> 13 ; AVX-NEXT: vxorps %ymm1, %ymm1, %ymm1 14 ; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] 15 ; AVX-NEXT: retq 23 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def> 24 ; AVX-NEXT: vxorpd %ymm1, %ymm1, %ymm1 25 ; AVX-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3] 26 ; AVX-NEXT: retq 36 ; AVX1-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def> 37 ; AVX1-NEXT: vxorpd %ymm1, %ymm1, %ymm [all...] |
avx-insertelt.ll | 7 ; ALL-NEXT: retq 15 ; ALL-NEXT: retq 23 ; AVX-NEXT: vpinsrb $0, %edi, %xmm0, %xmm1 24 ; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] 25 ; AVX-NEXT: retq 29 ; AVX2-NEXT: vpinsrb $0, %edi, %xmm0, %xmm1 30 ; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] 31 ; AVX2-NEXT: retq 39 ; AVX-NEXT: vpinsrw $0, %edi, %xmm0, %xmm1 40 ; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7 [all...] |
preserve_mostcc64.ll | 9 ;SSE-NEXT: pushq %r9 10 ;SSE-NEXT: pushq %r8 11 ;SSE-NEXT: pushq %rdi 12 ;SSE-NEXT: pushq %rsi 13 ;SSE-NEXT: pushq %rdx 14 ;SSE-NEXT: pushq %rcx 15 ;SSE-NEXT: pushq %rax 16 ;SSE-NEXT: pushq %rbp 17 ;SSE-NEXT: pushq %r15 18 ;SSE-NEXT: pushq %r1 [all...] |
return-ext.ll | 26 ; CHECK-NEXT: sete 27 ; CHECK-NEXT: ret 40 ; CHECK-NEXT: sete 41 ; CHECK-NEXT: ret 46 ; DARWIN-NEXT: cmp 47 ; DARWIN-NEXT: sete 48 ; DARWIN-NEXT: ret 61 ; CHECK-NEXT: sete 62 ; CHECK-NEXT: ret 67 ; DARWIN-NEXT: cm [all...] |
sse4a-intrinsics-fast-isel.ll | 12 ; X32-NEXT: extrq $2, $3, %xmm0 13 ; X32-NEXT: retl 17 ; X64-NEXT: extrq $2, $3, %xmm0 18 ; X64-NEXT: retq 27 ; X32-NEXT: extrq %xmm1, %xmm0 28 ; X32-NEXT: retl 32 ; X64-NEXT: extrq %xmm1, %xmm0 33 ; X64-NEXT: retq 43 ; X32-NEXT: insertq $6, $5, %xmm1, %xmm0 44 ; X32-NEXT: ret [all...] |
vec_fabs.ll | 10 ; X32-NEXT: vandpd .LCPI0_0, %xmm0, %xmm0 11 ; X32-NEXT: retl 15 ; X64-NEXT: vandpd {{.*}}(%rip), %xmm0, %xmm0 16 ; X64-NEXT: retq 25 ; X32-NEXT: vandps .LCPI1_0, %xmm0, %xmm0 26 ; X32-NEXT: retl 30 ; X64-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 31 ; X64-NEXT: retq 40 ; X32-NEXT: vandpd .LCPI2_0, %ymm0, %ymm0 41 ; X32-NEXT: ret [all...] |
vec_logical.ll | 8 ; SSE-NEXT: xorps .LCPI0_0, %xmm0 9 ; SSE-NEXT: movaps %xmm0, 0 10 ; SSE-NEXT: retl 14 ; AVX-NEXT: vxorps .LCPI0_0, %xmm0, %xmm0 15 ; AVX-NEXT: vmovaps %xmm0, 0 16 ; AVX-NEXT: retl 25 ; SSE-NEXT: xorps %xmm1, %xmm0 26 ; SSE-NEXT: retl 30 ; AVX-NEXT: vxorps %xmm1, %xmm0, %xmm0 31 ; AVX-NEXT: ret [all...] |
x86-64-intrcc.ll | 60 ; CHECK-SSE-NEXT: pushq %rax 61 ; CHECK-SSE-NEXT; pushq %r11 62 ; CHECK-SSE-NEXT: pushq %rbp 63 ; CHECK-SSE-NEXT: pushq %rbx 64 ; CHECK-SSE-NEXT: movaps %xmm0 65 ; CHECK-SSE-NEXT: movaps %xmm0 66 ; CHECK-SSE-NEXT: popq %rbx 67 ; CHECK-SSE-NEXT: popq %rbp 68 ; CHECK-SSE-NEXT: popq %r11 69 ; CHECK-SSE-NEXT: popq %ra [all...] |
avx2-vbroadcast.ll | 8 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 9 ; X32-NEXT: vpbroadcastb (%eax), %xmm0 10 ; X32-NEXT: retl 14 ; X64-NEXT: vpbroadcastb (%rdi), %xmm0 15 ; X64-NEXT: retq 40 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 41 ; X32-NEXT: vpbroadcastb (%eax), %ymm0 42 ; X32-NEXT: retl 46 ; X64-NEXT: vpbroadcastb (%rdi), %ymm0 47 ; X64-NEXT: ret [all...] |
/external/llvm/test/Transforms/EarlyCSE/ |
guards.ll | 10 ; CHECK-NEXT: store i32 40, i32* %ptr 11 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ] 12 ; CHECK-NEXT: ret i32 40 24 ; CHECK-NEXT: %val0 = load i32, i32* %val 25 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ] 26 ; CHECK-NEXT: ret i32 0 39 ; CHECK-NEXT: ret i32 0 49 ; CHECK-NEXT: %cond0 = icmp slt i32 %val, 40 50 ; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 %cond0) [ "deopt"() ] 51 ; CHECK-NEXT: ret i32 - [all...] |
/external/curl/lib/ |
llist.c | 65 list->head->next = NULL; 70 ne->next = e?e->next:list->head; 76 else if(e->next) { 77 e->next->prev = ne; 83 e->next = ne; 101 list->head = e->next; 106 e->next->prev = NULL; 110 list->head = e->next; 112 e->prev->next = e->next [all...] |
/external/llvm/test/Transforms/InstCombine/ |
demorgan-zext.ll | 8 ; CHECK-NEXT: [[OR_DEMORGAN:%.*]] = and i1 %X, %Y 9 ; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[OR_DEMORGAN]] to i32 10 ; CHECK-NEXT: [[OR:%.*]] = xor i32 [[TMP1]], 1 11 ; CHECK-NEXT: ret i32 [[OR]] 23 ; CHECK-NEXT: [[AND_DEMORGAN:%.*]] = or i1 %X, %Y 24 ; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[AND_DEMORGAN]] to i32 25 ; CHECK-NEXT: [[AND:%.*]] = xor i32 [[TMP1]], 1 26 ; CHECK-NEXT: ret i32 [[AND]] 40 ; CHECK-NEXT: [[ZEXTX:%.*]] = zext <2 x i1> %X to <2 x i32> 41 ; CHECK-NEXT: [[ZEXTY:%.*]] = zext <2 x i1> %Y to <2 x i32 [all...] |
/external/llvm/test/Transforms/LowerSwitch/ |
feature.ll | 7 ;CHECK-NEXT: br label %NodeBlock19 10 ;CHECK-NEXT: %Pivot20 = icmp slt i32 %tmp158, 10 11 ;CHECK-NEXT: br i1 %Pivot20, label %NodeBlock5, label %NodeBlock17 14 ;CHECK-NEXT: %Pivot18 = icmp slt i32 %tmp158, 13 15 ;CHECK-NEXT: br i1 %Pivot18, label %NodeBlock9, label %NodeBlock15 18 ;CHECK-NEXT: %Pivot16 = icmp slt i32 %tmp158, 14 19 ;CHECK-NEXT: br i1 %Pivot16, label %bb330, label %NodeBlock13 22 ;CHECK-NEXT: %Pivot14 = icmp slt i32 %tmp158, 15 23 ;CHECK-NEXT: br i1 %Pivot14, label %bb332, label %LeafBlock11 26 ;CHECK-NEXT: %SwitchLeaf12 = icmp eq i32 %tmp158, 1 [all...] |
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
load-cmp.ll | 14 ; CHECK-NEXT: %R = icmp eq i32 %X, 9 15 ; CHECK-NEXT: ret i1 %R 24 ; CHECK-NEXT: %R = icmp ne i32 %X, 4 25 ; CHECK-NEXT: ret i1 %R 34 ; CHECK-NEXT: %R = icmp eq i32 %X, 1 35 ; CHECK-NEXT: ret i1 %R 44 ; CHECK-NEXT: lshr i32 933, %X 45 ; CHECK-NEXT: and i32 {{.*}}, 1 46 ; CHECK-NEXT: %R = icmp ne i32 {{.*}}, 0 47 ; CHECK-NEXT: ret i1 % [all...] |
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
load.ll | 15 ; CHECK-NEXT: %__1 = load i8, i8* %__0, align 1 16 ; CHECK-NEXT: %__2 = sext i8 %__1 to i32 17 ; CHECK-NEXT: ret i32 %__2 28 ; CHECK-NEXT: %__1 = load i16, i16* %__0, align 1 29 ; CHECK-NEXT: %__2 = sext i16 %__1 to i32 30 ; CHECK-NEXT: ret i32 %__2 40 ; CHECK-NEXT: %__1 = load i32, i32* %__0, align 1 41 ; CHECK-NEXT: ret i32 %__1 51 ; CHECK-NEXT: %__1 = load i64, i64* %__0, align 1 52 ; CHECK-NEXT: ret i64 %__ [all...] |