| /external/llvm/test/CodeGen/MIR/Generic/ |
| frame-info.mir | 30 # CHECK-NEXT: isFrameAddressTaken: false
31 # CHECK-NEXT: isReturnAddressTaken: false
32 # CHECK-NEXT: hasStackMap: false
33 # CHECK-NEXT: hasPatchPoint: false
34 # CHECK-NEXT: stackSize: 0
35 # CHECK-NEXT: offsetAdjustment: 0
37 # CHECK-NEXT: maxAlignment:
38 # CHECK-NEXT: adjustsStack: false
39 # CHECK-NEXT: hasCalls: false
40 # CHECK-NEXT: maxCallFrameSize:
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| float-asmprint.ll | 16 ; CHECK-NEXT: .quad 0 # fp128 -0
17 ; CHECK-NEXT: .quad -9223372036854775808
18 ; CHECK-NEXT: .size
22 ; CHECK-NEXT: .quad -9223372036854775808 # ppc_fp128 -0
23 ; CHECK-NEXT: .quad 0
24 ; CHECK-NEXT: .size
27 ; CHECK-NEXT: .quad 0 # x86_fp80 -0
28 ; CHECK-NEXT: .short 32768
29 ; CHECK-NEXT: .zero 6
30 ; CHECK-NEXT: .siz
[all...] |
| vec_insert-4.ll | 8 ; X32-NEXT: pushl %ebp
9 ; X32-NEXT: movl %esp, %ebp
10 ; X32-NEXT: andl $-32, %esp
11 ; X32-NEXT: subl $64, %esp
12 ; X32-NEXT: movl 8(%ebp), %eax
13 ; X32-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
14 ; X32-NEXT: movaps %xmm0, (%esp)
15 ; X32-NEXT: movl $1084227584, (%esp,%eax,4) ## imm = 0x40A00000
16 ; X32-NEXT: movaps (%esp), %xmm0
17 ; X32-NEXT: movaps {{[0-9]+}}(%esp), %xmm
[all...] |
| vector-shift-lshr-256.ll | 14 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
15 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
16 ; AVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm4
17 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
18 ; AVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm2
19 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0,1,2,3],xmm2[4,5,6,7]
20 ; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm3
21 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
22 ; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
23 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7
[all...] |
| bmi-intrinsics-fast-isel.ll | 14 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
15 ; X32-NEXT: movzwl %ax, %ecx
16 ; X32-NEXT: cmpl $0, %ecx
17 ; X32-NEXT: jne .LBB0_1
18 ; X32-NEXT: # BB#2:
19 ; X32-NEXT: movw $16, %ax
20 ; X32-NEXT: retl
21 ; X32-NEXT: .LBB0_1:
22 ; X32-NEXT: tzcntw %ax, %ax
23 ; X32-NEXT: ret
[all...] |
| promote-vec3.ll | 11 ; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
12 ; SSE3-NEXT: pxor %xmm0, %xmm0
13 ; SSE3-NEXT: pxor %xmm1, %xmm1
14 ; SSE3-NEXT: pinsrw $0, %eax, %xmm1
15 ; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
16 ; SSE3-NEXT: pinsrw $1, %eax, %xmm1
17 ; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
18 ; SSE3-NEXT: pinsrw $2, %eax, %xmm1
19 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
20 ; SSE3-NEXT: movd %xmm1, %ea
[all...] |
| pr27591.ll | 8 ; CHECK-NEXT: pushq %rax
9 ; CHECK-NEXT: testl %edi, %edi
10 ; CHECK-NEXT: setne %al
11 ; CHECK-NEXT: movb %al, %cl
12 ; CHECK-NEXT: kmovw %ecx, %k0
13 ; CHECK-NEXT: kmovb %k0, %eax
14 ; CHECK-NEXT: andb $1, %al
15 ; CHECK-NEXT: movzbl %al, %edi
16 ; CHECK-NEXT: callq callee1
17 ; CHECK-NEXT: popq %ra
[all...] |
| /external/llvm/test/tools/llvm-readobj/ |
| codeview-vftable.test | 23 CHECK-NEXT: TypeLeafKind: LF_VFTABLE (0x151D)
24 CHECK-NEXT: CompleteClass: A
25 CHECK-NEXT: OverriddenVFTable: 0x0
26 CHECK-NEXT: VFPtrOffset: 0x0
27 CHECK-NEXT: VFTableName: ??_7A@@6B@
28 CHECK-NEXT: MethodName: ?f@A@@UEAAXXZ
29 CHECK-NEXT: }
30 CHECK-NEXT: VFTable (0x10F1) {
31 CHECK-NEXT: TypeLeafKind: LF_VFTABLE (0x151D)
32 CHECK-NEXT: CompleteClass:
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| blx.ll | 29 ; ASM-NEXT:.LcallIndirect$entry:
30 ; IASM-NEXT:.LcallIndirect$entry:
31 ; ASM-NEXT: push {lr}
32 ; DIS-NEXT: 0: e52de004
33 ; IASM-NEXT: .byte 0x4
34 ; IASM-NEXT: .byte 0xe0
35 ; IASM-NEXT: .byte 0x2d
36 ; IASM-NEXT: .byte 0xe5
38 ; ASM-NEXT: sub sp, sp, #12
39 ; DIS-NEXT: 4: e24dd00
[all...] |
| /external/clang/test/Layout/ |
| ms-x86-pack-and-align.cpp | 40 // CHECK-NEXT: 0 | struct X
41 // CHECK-NEXT: 0 | struct B a
42 // CHECK-NEXT: 0 | long long a
43 // CHECK-NEXT: 8 | char b
44 // CHECK-NEXT: 10 | int c
45 // CHECK-NEXT: | [sizeof=16, align=4
46 // CHECK-NEXT: | nvsize=14, nvalign=4]
49 // CHECK-X64-NEXT: 0 | struct X
50 // CHECK-X64-NEXT: 0 | struct B a
51 // CHECK-X64-NEXT: 0 | long long
[all...] |
| ms-x86-empty-nonvirtual-bases.cpp | 27 // CHECK-NEXT: 0 | struct A
28 // CHECK-NEXT: 0 | struct B0 (base) (empty)
29 // CHECK-NEXT: 0 | int a
30 // CHECK-NEXT: | [sizeof=8, align=8
31 // CHECK-NEXT: | nvsize=8, nvalign=8]
40 // CHECK-NEXT: 0 | struct B
41 // CHECK-NEXT: 0 | struct B0 (base) (empty)
42 // CHECK-NEXT: 0 | struct B0 b0 (empty)
44 // CHECK-NEXT: | [sizeof=16, align=8
45 // CHECK-NEXT: | nvsize=16, nvalign=8
[all...] |
| ms-x86-vtordisp.cpp | 35 // CHECK-NEXT: 0 | struct A
36 // CHECK-NEXT: 0 | (A vftable pointer)
37 // CHECK-NEXT: 4 | (A vbtable pointer)
38 // CHECK-NEXT: 8 | int a
39 // CHECK-NEXT: 16 | (vtordisp for vbase B0)
40 // CHECK-NEXT: 20 | struct B0 (virtual base)
41 // CHECK-NEXT: 20 | (B0 vftable pointer)
42 // CHECK-NEXT: 24 | int a
43 // CHECK-NEXT: 44 | (vtordisp for vbase B1)
44 // CHECK-NEXT: 48 | struct B1 (virtual base
[all...] |
| /external/llvm/test/Object/Mips/ |
| elf-flags.yaml | 6 # OBJ-NEXT: EF_MIPS_32BITMODE (0x100)
7 # OBJ-NEXT: EF_MIPS_ABI2 (0x20)
8 # OBJ-NEXT: EF_MIPS_ABI_O32 (0x1000)
9 # OBJ-NEXT: EF_MIPS_ARCH_32R6 (0x90000000)
10 # OBJ-NEXT: EF_MIPS_ARCH_ASE_M16 (0x4000000)
11 # OBJ-NEXT: EF_MIPS_ARCH_ASE_MDMX (0x8000000)
12 # OBJ-NEXT: EF_MIPS_CPIC (0x4)
13 # OBJ-NEXT: EF_MIPS_FP64 (0x200)
14 # OBJ-NEXT: EF_MIPS_MACH_OCTEON (0x8B0000)
15 # OBJ-NEXT: EF_MIPS_MICROMIPS (0x2000000
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/MachO/ |
| debug_frame.s | 29 // CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00')
30 // CHECK-NEXT: ('address', 8)
31 // CHECK-NEXT: ('size', 52)
32 // CHECK-NEXT: ('offset', 332)
33 // CHECK-NEXT: ('alignment', 2)
34 // CHECK-NEXT: ('reloc_offset', 384)
35 // CHECK-NEXT: ('num_reloc', 2)
36 // CHECK-NEXT: ('flags', 0x2000000)
37 // CHECK-NEXT: ('reserved1', 0)
38 // CHECK-NEXT: ('reserved2', 0
[all...] |
| /external/clang/test/Index/ |
| complete-property-flags.m | 13 // CHECK-CC1-NEXT: {TypedText atomic}
14 // CHECK-CC1-NEXT: {TypedText copy}
15 // CHECK-CC1-NEXT: {TypedText getter}{Text =}{Placeholder method}
16 // CHECK-CC1-NEXT: {TypedText nonatomic}
18 // CHECK-CC1-NEXT: {TypedText null_resettable}
19 // CHECK-CC1-NEXT: {TypedText null_unspecified}
20 // CHECK-CC1-NEXT: {TypedText nullable}
21 // CHECK-CC1-NEXT: {TypedText readonly}
22 // CHECK-CC1-NEXT: {TypedText readwrite}
23 // CHECK-CC1-NEXT: {TypedText retain
[all...] |
| /external/llvm/test/Transforms/LoadStoreVectorizer/X86/ |
| subchain-interleaved.ll | 14 %next.gep = getelementptr i32, i32* %ptr, i64 0
15 %next.gep1 = getelementptr i32, i32* %ptr, i64 1
16 %next.gep2 = getelementptr i32, i32* %ptr, i64 2
18 %l1 = load i32, i32* %next.gep1, align 4
19 %l2 = load i32, i32* %next.gep, align 4
20 store i32 0, i32* %next.gep1, align 4
21 store i32 0, i32* %next.gep, align 4
22 %l3 = load i32, i32* %next.gep1, align 4
23 %l4 = load i32, i32* %next.gep2, align 4
34 %next.gep = getelementptr i32, i32* %ptr, i64
[all...] |
| /external/llvm/test/tools/llvm-readobj/ARM/ |
| attribute-2.s | 7 @CHECK-OBJ-NEXT: Value: 2
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v4T
14 @CHECK-OBJ-NEXT: Value: 2
15 @CHECK-OBJ-NEXT: TagName: THUMB_ISA_use
16 @CHECK-OBJ-NEXT: Description: Thumb-2
21 @CHECK-OBJ-NEXT: Value: 2
22 @CHECK-OBJ-NEXT: TagName: FP_arch
23 @CHECK-OBJ-NEXT: Description: VFPv2
28 @CHECK-OBJ-NEXT: Value:
[all...] |
| attribute-0.s | 7 @CHECK-OBJ-NEXT: Value: 0
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: Pre-v4
14 @CHECK-OBJ-NEXT: Value: 0
15 @CHECK-OBJ-NEXT: TagName: CPU_arch_profile
16 @CHECK-OBJ-NEXT: Description: None
21 @CHECK-OBJ-NEXT: Value: 0
22 @CHECK-OBJ-NEXT: TagName: ARM_ISA_use
23 @CHECK-OBJ-NEXT: Description: Not Permitted
28 @CHECK-OBJ-NEXT: Value:
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| loop-nest-depth.ll | 24 ; CHECK-NEXT: entry:
25 ; CHECK-NEXT: LoopNestDepth = 0
26 ; CHECK-NEXT: loop0:
27 ; CHECK-NEXT: LoopNestDepth = 1
28 ; CHECK-NEXT: loop1:
29 ; CHECK-NEXT: LoopNestDepth = 1
30 ; CHECK-NEXT: out:
31 ; CHECK-NEXT: LoopNestDepth = 0
52 ; CHECK-NEXT: entry:
53 ; CHECK-NEXT: LoopNestDepth =
[all...] |
| /external/llvm/test/MC/Mips/ |
| cpsetup.s | 33 # NXX-NEXT: sd $gp, 8($sp)
34 # NXX-NEXT: lui $gp, 0
35 # N32-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE __gnu_local_gp
36 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror
37 # NXX-NEXT: addiu $gp, $gp, 0
38 # N32-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE __gnu_local_gp
39 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
40 # N64-NEXT: daddu $gp, $gp, $25
42 # ASM-NEXT: .cpsetup $25, 8, __cerror
44 # ALL-NEXT: no
[all...] |
| /external/llvm/test/DebugInfo/COFF/ |
| multifile.ll | 34 ; X86-NEXT: .p2align 2
35 ; X86-NEXT: .long 4
37 ; X86-NEXT: .long 241
38 ; X86-NEXT: .long [[F1_END:.*]]-[[F1_START:.*]] #
39 ; X86-NEXT: [[F1_START]]:
40 ; X86-NEXT: .short [[PROC_SEGMENT_END:.*]]-[[PROC_SEGMENT_START:.*]] #
41 ; X86-NEXT: [[PROC_SEGMENT_START]]:
42 ; X86-NEXT: .short 4423
43 ; X86-NEXT: .long 0
44 ; X86-NEXT: .long
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | 84 // CHECK-ERROR-NEXT: add w4, w5, #-4096
85 // CHECK-ERROR-NEXT: ^
86 // CHECK-ERROR-AARCH64-NEXT: error: expected compatible register, symbol or integer in range [0, 4095]
87 // CHECK-ERROR-AARCH64-NEXT: add w5, w6, #0x1000
88 // CHECK-ERROR-AARCH64-NEXT: ^
89 // CHECK-ERROR-NEXT: error: expected compatible register, symbol or integer in range [0, 4095]
90 // CHECK-ERROR-NEXT: add w4, w5, #-4096, lsl #12
91 // CHECK-ERROR-NEXT: ^
92 // CHECK-ERROR-NEXT: error: expected compatible register, symbol or integer in range [0, 4095]
93 // CHECK-ERROR-NEXT: add w5, w6, #0x1000, lsl #1
[all...] |
| /external/clang/test/Driver/ |
| at_file.c | 7 // CHECK-NEXT: bar2 zed2
8 // CHECK-NEXT: bar3 zed3
9 // CHECK-NEXT: bar4 zed4
10 // CHECK-NEXT: bar5 zed5
11 // CHECK-NEXT: 'bar6 zed6'
12 // CHECK-NEXT: "bar7 zed7"
13 // CHECK-NEXT: foo8bar8zed8
14 // CHECK-NEXT: foo9'bar9'zed9
15 // CHECK-NEXT: foo10"bar10"zed10
|
| at_file_win.c | 5 // CHECK-NEXT: bar2 zed2
6 // CHECK-NEXT: bar3 zed3
7 // CHECK-NEXT: bar4 zed4
8 // CHECK-NEXT: bar5 zed5
9 // CHECK-NEXT: 'bar6 zed6'
10 // CHECK-NEXT: 'bar7 zed7'
11 // CHECK-NEXT: foo8bar8zed8
12 // CHECK-NEXT: foo9\'bar9\'zed9
13 // CHECK-NEXT: foo10"bar10"zed10
|
| /external/clang/test/Rewriter/ |
| unnamed-bf-modern-write.mm | 18 // CHECK-NEXT: int : 1;
19 // CHECK-NEXT: int third : 1;
20 // CHECK-NEXT: int : 1;
21 // CHECK-NEXT: int fifth : 1;
22 // CHECK-NEXT: char : 0;
23 // CHECK-NEXT: } ;
25 // CHECK-NEXT: int first;
26 // CHECK-NEXT: struct Foo__T_1 Foo__GRBF_1;
27 // CHECK-NEXT: };
|
