/external/llvm/test/MC/Lanai/ |
memory.s | 9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}} 10 ! CHECK-NEXT: <MCOperand Reg:13> 11 ! CHECK-NEXT: <MCOperand Reg:14> 12 ! CHECK-NEXT: <MCOperand Imm:0> 13 ! CHECK-NEXT: <MCOperand Imm:0> 17 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}} 18 ! CHECK-NEXT: <MCOperand Reg:13> 19 ! CHECK-NEXT: <MCOperand Reg:13> 20 ! CHECK-NEXT: <MCOperand Imm:0> 21 ! CHECK-NEXT: <MCOperand Imm:0 [all...] |
/external/llvm/test/tools/llvm-pdbdump/ |
enum-layout.test | 8 ; GLOBAL_ENUM-NEXT: Val1 = 0 9 ; GLOBAL_ENUM-NEXT: } 14 ; MEMBER_ENUM-NEXT: enum threading_e { 15 ; MEMBER_ENUM-NEXT: apartment = 1 16 ; MEMBER_ENUM-NEXT: single = 2 17 ; MEMBER_ENUM-NEXT: free = 3 18 ; MEMBER_ENUM-NEXT: neutral = 4 19 ; MEMBER_ENUM-NEXT: both = 5 20 ; MEMBER_ENUM-NEXT: }
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/external/swiftshader/third_party/LLVM/test/MC/ELF/ |
align-bss.s | 9 // CHECK-NEXT: ('sh_type', 0x00000008) 10 // CHECK-NEXT: ('sh_flags', 0x0000000000000003) 11 // CHECK-NEXT: ('sh_addr', 0x0000000000000000) 12 // CHECK-NEXT: ('sh_offset', 0x0000000000000040) 13 // CHECK-NEXT: ('sh_size', 0x0000000000000800) 14 // CHECK-NEXT: ('sh_link', 0x00000000) 15 // CHECK-NEXT: ('sh_info', 0x00000000) 16 // CHECK-NEXT: ('sh_addralign', 0x0000000000000010) 17 // CHECK-NEXT: ('sh_entsize', 0x0000000000000000)
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common2.s | 13 // CHECK-NEXT: ('sh_type', 14 // CHECK-NEXT: ('sh_flags' 15 // CHECK-NEXT: ('sh_addr', 16 // CHECK-NEXT: ('sh_offset', 17 // CHECK-NEXT: ('sh_size', 0x0000000000000009) 18 // CHECK-NEXT: ('sh_link', 19 // CHECK-NEXT: ('sh_info', 20 // CHECK-NEXT: ('sh_addralign', 21 // CHECK-NEXT: ('sh_entsize',
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set.s | 8 // CHECK-NEXT: ('st_bind', 0x0) 9 // CHECK-NEXT: ('st_type', 0x0) 10 // CHECK-NEXT: ('st_other', 0x00) 11 // CHECK-NEXT: ('st_shndx', 0xfff1) 12 // CHECK-NEXT: ('st_value', 0xffffffff80000000) 13 // CHECK-NEXT: ('st_size', 0x0000000000000000) 14 // CHECK-NEXT: ), 28 // CHECK-NEXT: ('st_bind', 0x1) 29 // CHECK-NEXT: ('st_type', 0x0) 30 // CHECK-NEXT: ('st_other', 0x00 [all...] |
entsize.ll | 24 ; 64-NEXT: ('sh_type', 0x00000001) 25 ; 64-NEXT: ('sh_flags', 0x0000000000000032) 26 ; 64-NEXT: ('sh_addr', 27 ; 64-NEXT: ('sh_offset', 28 ; 64-NEXT: ('sh_size', 0x000000000000000d) 29 ; 64-NEXT: ('sh_link', 30 ; 64-NEXT: ('sh_info', 31 ; 64-NEXT: ('sh_addralign', 0x0000000000000001) 32 ; 64-NEXT: ('sh_entsize', 0x0000000000000001) 35 ; 64-NEXT: ('sh_type', 0x00000001 [all...] |
/external/swiftshader/third_party/LLVM/test/MC/MachO/ |
x86_64-reloc-arithmetic.s | 11 // CHECK-NEXT: # Relocation 0 12 // CHECK-NEXT: (('word-0', 0x103), 13 // CHECK-NEXT: ('word-1', 0x1d000001)) 16 // CHECK-NEXT: (('n_strx', 6) 17 // CHECK-NEXT: ('n_type', 0xe) 18 // CHECK-NEXT: ('n_sect', 1) 19 // CHECK-NEXT: ('n_desc', 0) 20 // CHECK-NEXT: ('n_value', 258) 21 // CHECK-NEXT: ('_string', '_bar')
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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
store-sf.ll | 29 ; ASM-NEXT: .Ltest_vla_in_loop$entry: 30 ; IASM-NEXT: .Ltest_vla_in_loop$entry: 32 ; ASM-NEXT: push {fp} 33 ; DIS-NEXT: 0: e52db004 34 ; IASM-NEXT: .byte 0x4 35 ; IASM-NEXT: .byte 0xb0 36 ; IASM-NEXT: .byte 0x2d 37 ; IASM-NEXT: .byte 0xe5 39 ; ASM-NEXT: mov fp, sp 40 ; DIS-NEXT: 4: e1a0b00 [all...] |
/external/clang/test/Sema/ |
ms_class_layout.cpp | 164 // CHECK-NEXT: 0 | (D vftable pointer) 165 // CHECK-NEXT: 8 | double a 167 // CHECK-NEXT: sizeof=16, align=8 168 // CHECK-NEXT: nvsize=16, nvalign=8 173 // CHECK-NEXT: 0 | (B vftable pointer) 174 // CHECK-NEXT: 4 | int b_field 176 // CHECK-NEXT: sizeof=8, align=4 177 // CHECK-NEXT: nvsize=8, nvalign=4 182 // CHECK-NEXT: 0 | class B (primary base) 183 // CHECK-NEXT: 0 | (B vftable pointer [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
andc.ll | 8 ; CHECK-NEXT: and r2, r3, r4 9 ; CHECK-NEXT: li r3, 1 10 ; CHECK-NEXT: cmpw cr0, r2, r4 11 ; CHECK-NEXT: bclr 12, 2, 0 12 ; CHECK-NEXT: ; BB#1: 13 ; CHECK-NEXT: li r3, 0 14 ; CHECK-NEXT: blr 24 ; CHECK-NEXT: andi. r2, r3, 43 25 ; CHECK-NEXT: li r3, 1 26 ; CHECK-NEXT: cmpwi r2, 4 [all...] |
/external/llvm/test/CodeGen/X86/ |
mul64.ll | 8 ; X32-NEXT: pushl %esi 9 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx 10 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi 11 ; X32-NEXT: movl %ecx, %eax 12 ; X32-NEXT: mull %esi 13 ; X32-NEXT: imull {{[0-9]+}}(%esp), %ecx 14 ; X32-NEXT: addl %ecx, %edx 15 ; X32-NEXT: imull {{[0-9]+}}(%esp), %esi 16 ; X32-NEXT: addl %esi, %edx 17 ; X32-NEXT: popl %es [all...] |
preserve_allcc64.ll | 8 ;SSE-NEXT: pushq %r9 9 ;SSE-NEXT: pushq %r8 10 ;SSE-NEXT: pushq %rdi 11 ;SSE-NEXT: pushq %rsi 12 ;SSE-NEXT: pushq %rdx 13 ;SSE-NEXT: pushq %rcx 14 ;SSE-NEXT: pushq %rax 15 ;SSE-NEXT: pushq %rbp 16 ;SSE-NEXT: pushq %r15 17 ;SSE-NEXT: pushq %r1 [all...] |
vector-shuffle-v1.ll | 10 ; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 11 ; AVX512F-NEXT: retq 15 ; VL_BW_DQ-NEXT: vpsllq $63, %xmm0, %xmm0 16 ; VL_BW_DQ-NEXT: vptestmq %xmm0, %xmm0, %k0 17 ; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 18 ; VL_BW_DQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 19 ; VL_BW_DQ-NEXT: vpsllq $63, %xmm0, %xmm0 20 ; VL_BW_DQ-NEXT: vptestmq %xmm0, %xmm0, %k0 21 ; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 22 ; VL_BW_DQ-NEXT: ret [all...] |
fp128-select.ll | 10 ; MMX-NEXT: testb %dl, %dl 11 ; MMX-NEXT: jne .LBB0_1 12 ; MMX-NEXT: # BB#2: 13 ; MMX-NEXT: movaps {{.*}}(%rip), %xmm0 14 ; MMX-NEXT: movaps %xmm0, (%rsi) 15 ; MMX-NEXT: retq 16 ; MMX-NEXT: .LBB0_1: 17 ; MMX-NEXT: movaps (%rdi), %xmm0 18 ; MMX-NEXT: movaps %xmm0, (%rsi) 19 ; MMX-NEXT: ret [all...] |
vector-idiv.ll | 10 ; SSE-NEXT: xorps %xmm0, %xmm0 11 ; SSE-NEXT: retq 15 ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 16 ; AVX-NEXT: retq 26 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1431655766,1431655766,1431655766,1431655766] 27 ; SSE2-NEXT: movdqa %xmm1, %xmm2 28 ; SSE2-NEXT: psrad $31, %xmm2 29 ; SSE2-NEXT: pand %xmm0, %xmm2 30 ; SSE2-NEXT: movdqa %xmm0, %xmm3 31 ; SSE2-NEXT: psrad $31, %xmm [all...] |
/external/llvm/test/MC/ELF/ |
global-offset.s | 15 // CHECK-NEXT: Type: 16 // CHECK-NEXT: Flags [ 18 // CHECK-NEXT: Address: 19 // CHECK-NEXT: Offset: 20 // CHECK-NEXT: Size: 21 // CHECK-NEXT: Link: 22 // CHECK-NEXT: Info: 23 // CHECK-NEXT: AddressAlignment: 24 // CHECK-NEXT: EntrySize: 25 // CHECK-NEXT: SectionData [all...] |
rename.s | 21 // CHECK-NEXT: Type: SHT_RELA (0x4) 22 // CHECK-NEXT: Flags [ (0x0) 23 // CHECK-NEXT: ] 24 // CHECK-NEXT: Address: 0x0 25 // CHECK-NEXT: Offset: 26 // CHECK-NEXT: Size: 24 27 // CHECK-NEXT: Link: 28 // CHECK-NEXT: Info: 29 // CHECK-NEXT: AddressAlignment: 8 30 // CHECK-NEXT: EntrySize: 2 [all...] |
set.s | 9 // CHECK-NEXT: Value: 0xFFFFFFFF80000000 10 // CHECK-NEXT: Size: 0 11 // CHECK-NEXT: Binding: Local 12 // CHECK-NEXT: Type: None 13 // CHECK-NEXT: Other: 0 14 // CHECK-NEXT: Section: Absolute (0xFFF1) 15 // CHECK-NEXT: } 30 // CHECK-NEXT: Value: 0x0 31 // CHECK-NEXT: Size: 0 32 // CHECK-NEXT: Binding: Globa [all...] |
/external/llvm/test/Object/ |
yaml2obj-elf-alignment.yaml | 8 # CHECK-NEXT: Name: .data 9 # CHECK-NEXT: Type: SHT_PROGBITS 10 # CHECK-NEXT: Flags [ 11 # CHECK-NEXT: SHF_ALLOC 12 # CHECK-NEXT: SHF_WRITE 13 # CHECK-NEXT: ] 14 # CHECK-NEXT: Address: 0x0 15 # CHECK-NEXT: Offset: 0x{{[0-9A-F]*}}00 16 # CHECK-NEXT: Size: 4 17 # CHECK-NEXT: Link: [all...] |
/external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/ |
encoding_test_fcmp.ll | 33 ; ASM-NEXT: .LfcmpFalseFloat$entry: 35 ; ASM-NEXT: andi $v0, $v0, 1 36 ; ASM-NEXT: jr $ra 39 ; DIS-NEXT: 0: 24020000 li v0,0 40 ; DIS-NEXT: 4: 30420001 andi v0,v0,0x1 41 ; DIS-NEXT: 8: 03e00008 jr ra 44 ; IASM-NEXT: .LfcmpFalseFloat$entry: 45 ; IASM-NEXT: .byte 0x0 46 ; IASM-NEXT: .byte 0x0 47 ; IASM-NEXT: .byte 0x [all...] |
/external/libcxx/test/std/containers/associative/set/ |
erase_key.pass.cpp | 43 assert(*next(m.begin(), 0) == 1); 44 assert(*next(m.begin(), 1) == 2); 45 assert(*next(m.begin(), 2) == 3); 46 assert(*next(m.begin(), 3) == 4); 47 assert(*next(m.begin(), 4) == 5); 48 assert(*next(m.begin(), 5) == 6); 49 assert(*next(m.begin(), 6) == 7); 50 assert(*next(m.begin(), 7) == 8); 55 assert(*next(m.begin(), 0) == 1); 56 assert(*next(m.begin(), 1) == 2) [all...] |
/external/llvm/test/Instrumentation/EfficiencySanitizer/ |
working_set_strict.ll | 15 ; CHECK-NEXT: %1 = and i64 %0, 17592186044415 16 ; CHECK-NEXT: %2 = add i64 %1, 1337006139375616 17 ; CHECK-NEXT: %3 = lshr i64 %2, 6 18 ; CHECK-NEXT: %4 = inttoptr i64 %3 to i8* 19 ; CHECK-NEXT: %5 = load i8, i8* %4 20 ; CHECK-NEXT: %6 = and i8 %5, -127 21 ; CHECK-NEXT: %7 = icmp ne i8 %6, -127 22 ; CHECK-NEXT: br i1 %7, label %8, label %11 24 ; CHECK-NEXT: %10 = inttoptr i64 %3 to i8* 25 ; CHECK-NEXT: store i8 %9, i8* %1 [all...] |
/external/swiftshader/third_party/LLVM/test/MC/COFF/ |
seh.s | 5 // CHECK-NEXT: VirtualSize 6 // CHECK-NEXT: VirtualAddress 7 // CHECK-NEXT: SizeOfRawData = 52 8 // CHECK-NEXT: PointerToRawData 9 // CHECK-NEXT: PointerToRelocations 10 // CHECK-NEXT: PointerToLineNumbers 11 // CHECK-NEXT: NumberOfRelocations = 4 12 // CHECK-NEXT: NumberOfLineNumbers = 0 13 // CHECK-NEXT: Charateristics 14 // CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DAT [all...] |
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
branch.ll | 19 ; CHECK-NEXT: entry: 20 ; CHECK-NEXT: br label %b3 21 ; CHECK-NEXT: b1: 22 ; CHECK-NEXT: br label %b2 23 ; CHECK-NEXT: b2: 24 ; CHECK-NEXT: ret void 25 ; CHECK-NEXT: b3: 26 ; CHECK-NEXT: br label %b1 27 ; CHECK-NEXT: } 39 ; CHECK-NEXT: define internal void @CondBranch(i32 %p) [all...] |
/prebuilts/ndk/r16/sources/cxx-stl/llvm-libc++/test/std/containers/associative/set/ |
erase_key.pass.cpp | 43 assert(*next(m.begin(), 0) == 1); 44 assert(*next(m.begin(), 1) == 2); 45 assert(*next(m.begin(), 2) == 3); 46 assert(*next(m.begin(), 3) == 4); 47 assert(*next(m.begin(), 4) == 5); 48 assert(*next(m.begin(), 5) == 6); 49 assert(*next(m.begin(), 6) == 7); 50 assert(*next(m.begin(), 7) == 8); 55 assert(*next(m.begin(), 0) == 1); 56 assert(*next(m.begin(), 1) == 2) [all...] |