| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| add.ll | 29 ; ASM-NEXT: .Ladd1ToR0$__0:
30 ; ASM-NEXT: add r0, r0, #1
31 ; ASM-NEXT: bx lr
34 ; DIS-NEXT: 0: e2800001
35 ; DIS-NEXT: 4: e12fff1e
39 ; IASM-NEXT: .byte 0x1
40 ; IASM-NEXT: .byte 0x0
41 ; IASM-NEXT: .byte 0x80
42 ; IASM-NEXT: .byte 0xe2
44 ; IASM-NEXT: .byte 0x1
[all...] |
| sub.ll | 29 ; ASM-NEXT: .LSub1FromR0$__0:
30 ; ASM-NEXT: sub r0, r0, #1
31 ; ASM-NEXT: bx lr
34 ; DIS-NEXT: 0: e2400001
35 ; DIS-NEXT: 4: e12fff1e
39 ; IASM-NEXT: .byte 0x1
40 ; IASM-NEXT: .byte 0x0
41 ; IASM-NEXT: .byte 0x40
42 ; IASM-NEXT: .byte 0xe2
44 ; IASM-NEXT: .byte 0x1
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| vector-sext.ll | 15 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
16 ; SSE2-NEXT: psraw $8, %xmm0
17 ; SSE2-NEXT: retq
21 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
22 ; SSSE3-NEXT: psraw $8, %xmm0
23 ; SSSE3-NEXT: retq
27 ; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
28 ; SSE41-NEXT: retq
32 ; AVX-NEXT: vpmovsxbw %xmm0, %xmm0
33 ; AVX-NEXT: ret
[all...] |
| anyext.ll | 10 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
11 ; X32-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
12 ; X32-NEXT: divb {{[0-9]+}}(%esp)
13 ; X32-NEXT: movzbl %al, %eax
14 ; X32-NEXT: andl $1, %eax
15 ; X32-NEXT: retl
19 ; X64-NEXT: movzbl %dil, %eax
20 ; X64-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
21 ; X64-NEXT: divb %sil
22 ; X64-NEXT: movzbl %al, %ea
[all...] |
| cmovcmov.ll | 12 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
13 ; CMOV-NEXT: cmovnel %esi, %edi
14 ; CMOV-NEXT: cmovpl %esi, %edi
15 ; CMOV-NEXT: movl %edi, %eax
16 ; CMOV-NEXT: retq
18 ; NOCMOV-NEXT: flds 8(%esp)
19 ; NOCMOV-NEXT: flds 4(%esp)
20 ; NOCMOV-NEXT: fucompp
21 ; NOCMOV-NEXT: fnstsw %ax
22 ; NOCMOV-NEXT: sah
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-anyregcc.ll | 5 ; CHECK-NEXT: __LLVM_StackMaps:
7 ; CHECK-NEXT: .byte 1
8 ; CHECK-NEXT: .byte 0
9 ; CHECK-NEXT: .short 0
11 ; CHECK-NEXT: .long 8
13 ; CHECK-NEXT: .long 0
15 ; CHECK-NEXT: .long 8
18 ; CHECK-NEXT: .quad _test
19 ; CHECK-NEXT: .quad 16
20 ; CHECK-NEXT: .quad _property_access
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| ppc64-anyregcc.ll | 32 ; CHECK-NEXT: __LLVM_StackMaps:
34 ; CHECK-NEXT: .byte 1
35 ; CHECK-NEXT: .byte 0
36 ; CHECK-NEXT: .short 0
38 ; CHECK-NEXT: .long 8
40 ; CHECK-NEXT: .long 0
42 ; CHECK-NEXT: .long 8
45 ; CHECK-NEXT: .quad test
46 ; CHECK-NEXT: .quad 128
47 ; CHECK-NEXT: .quad property_access
[all...] |
| /external/clang/test/Layout/ |
| ms-x86-alias-avoidance-padding.cpp | 56 // CHECK-NEXT: 0 | struct AT3
57 // CHECK-NEXT: 0 | struct AT2 (base)
58 // CHECK-NEXT: 0 | struct AT0 t
59 // CHECK-NEXT: 0 | union AT0::(anonymous at {{.*}} x
60 // CHECK-NEXT: 0 | struct AT0::(anonymous at {{.*}} y
61 // CHECK-NEXT: 0 | int a
62 // CHECK-NEXT: 4 | struct AT t (empty)
66 // CHECK-NEXT: 20 | struct AT1 (base)
67 // CHECK-NEXT: 20 | struct V (base)
68 // CHECK-NEXT: 20 | struct AT (base) (empty
[all...] |
| ms-x86-primary-bases.cpp | 20 // CHECK-NEXT: 0 | struct A
21 // CHECK-NEXT: 0 | (A vbtable pointer)
22 // CHECK-NEXT: 4 | struct B0 (virtual base)
23 // CHECK-NEXT: 4 | (B0 vftable pointer)
24 // CHECK-NEXT: 8 | int a
25 // CHECK-NEXT: | [sizeof=12, align=4
26 // CHECK-NEXT: | nvsize=4, nvalign=4]
29 // CHECK-X64-NEXT: 0 | struct A
30 // CHECK-X64-NEXT: 0 | (A vbtable pointer)
31 // CHECK-X64-NEXT: 8 | struct B0 (virtual base
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
| binops.ll | 18 ; CHECK-NEXT: entry:
19 ; CHECK-NEXT: %add = add i32 %b, %a
20 ; CHECK-NEXT: ret i32 %add
21 ; CHECK-NEXT: }
29 ; CHECK-NEXT: define internal i64 @AddI64(i64 %a, i64 %b) {
30 ; CHECK-NEXT: entry:
31 ; CHECK-NEXT: %add = add i64 %b, %a
32 ; CHECK-NEXT: ret i64 %add
33 ; CHECK-NEXT: }
41 ; CHECK-NEXT: define internal <16 x i8> @AddV16I8(<16 x i8> %a, <16 x i8> %b)
[all...] |
| switch.ll | 16 ; CHECK-NEXT: entry:
17 ; CHECK-NEXT: switch i32 %a, label %exit [
18 ; CHECK-NEXT: ]
19 ; CHECK-NEXT: exit:
20 ; CHECK-NEXT: ret void
21 ; CHECK-NEXT: }
52 ; CHECK-NEXT: define internal i32 @testSwitch(i32 %a) {
53 ; CHECK-NEXT: entry:
54 ; CHECK-NEXT: switch i32 %a, label %sw.default [
55 ; CHECK-NEXT: i32 1, label %sw.epilo
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb-printf.txt | 4 # CHECK-NEXT: push {r4, r5, r7, lr}
5 # CHECK-NEXT: add r7, sp, #8
6 # CHECK-NEXT: sub sp, #4
7 # CHECK-NEXT: add r3, sp, #20
8 # CHECK-NEXT: ldr r5, [r3], #4
9 # CHECK-NEXT: str r3, [sp]
10 # CHECK-NEXT: ldr r3, [pc, #52]
11 # CHECK-NEXT: add r3, pc
12 # CHECK-NEXT: ldr r0, [r3]
13 # CHECK-NEXT: ldr r4, [r0
[all...] |
| /external/llvm/test/MC/Lanai/ |
| conditional_inst.s | 9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} JR{{$}}
10 ! CHECK-NEXT: <MCOperand Reg:12>>
15 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BT{{$}}
16 ! CHECK-NEXT: <MCOperand Imm:4660>
21 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BRCC{{$}}
22 ! CHECK-NEXT: <MCOperand Imm:2000>
23 ! CHECK-NEXT: <MCOperand Imm:13>
28 ! CHECK-NEXT: fixup A - offset: 0, value: jump1, kind: FIXUP_LANAI_25
29 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BRCC{{$}}
30 ! CHECK-NEXT: <MCOperand Expr:(jump1)
[all...] |
| /external/llvm/test/Object/Mips/ |
| elf-mips64-rel.yaml | 6 # OBJ-NEXT: Section (2) .rela.text {
7 # OBJ-NEXT: 0x14 R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 main 0x4
8 # OBJ-NEXT: 0x1C R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 main 0x8
9 # OBJ-NEXT: 0x20 R_MIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE .rodata 0x0
10 # OBJ-NEXT: 0x24 R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE .rodata 0x0
11 # OBJ-NEXT: 0x28 R_MIPS_CALL16/R_MIPS_NONE/R_MIPS_NONE printf 0x0
12 # OBJ-NEXT: 0x30 R_MIPS_GPREL16/R_MIPS_LO16/R_MIPS_NONE printf 0x0
13 # OBJ-NEXT: }
14 # OBJ-NEXT: ]
17 # YAML-NEXT: - Offset: 0x000000000000001
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| thumb-printf.txt | 4 # CHECK-NEXT: push {r4, r5, r7, lr}
5 # CHECK-NEXT: add r7, sp, #8
6 # CHECK-NEXT: sub sp, #4
7 # CHECK-NEXT: add r3, sp, #20
8 # CHECK-NEXT: ldr r5, [r3], #4
9 # CHECK-NEXT: str r3, [sp]
10 # CHECK-NEXT: ldr r3, #52
11 # CHECK-NEXT: add r3, pc
12 # CHECK-NEXT: ldr r0, [r3]
13 # CHECK-NEXT: ldr r4, [r0
[all...] |
| /external/clang/test/CodeGenCXX/ |
| vla-consruct.cpp | 23 // CHECK-NEXT: [[saved_stack:%.+]] = alloca
24 // CHECK-NEXT: [[sizeof_S:%.+]] = alloca
25 // CHECK-NEXT: [[sizeof_array_t_0_0:%.+]] = alloca
26 // CHECK-NEXT: [[sizeof_array_t_0:%.+]] = alloca
27 // CHECK-NEXT: [[sizeof_array_t:%.+]] = alloca
28 // CHECK-NEXT: [[exn_slot:%.+]] = alloca i8*
29 // CHECK-NEXT: [[ehselector_slot:%.+]] = alloca i32
30 // CHECK-NEXT: store i32 [[n]], i32* [[n_addr]]
31 // CHECK-NEXT: [[t0:%.+]] = load i32, i32* [[n_addr]]
32 // CHECK-NEXT: [[t1:%.+]] = zext i32 [[t0]] to i6
[all...] |
| /external/clang/test/Frontend/ |
| rewrite-includes-cli-include.c | 4 // CHECK-NEXT: {{^}}# 1 "{{.*[/\\]Inputs(/|\\\\)}}rewrite-includes2.h" 1{{$}}
5 // CHECK-NEXT: {{^}}included_line2{{$}}
6 // CHECK-NEXT: {{^}}# 1 "<built-in>" 2{{$}}
7 // CHECK-NEXT: {{^}}# 1 "{{.*}}rewrite-includes-cli-include.c"{{$}}
8 // CHECK-NEXT: FileCheck
9 // CHECK-NEXT: {{^}}main_file_line{{$}}
|
| /external/clang/test/Misc/ |
| ast-dump-comment.cpp | 6 // CHECK-NEXT: FullComment 0x{{[^ ]*}} <line:[[@LINE-3]]:4, col:7>
11 // CHECK-NEXT: {{^`-FullComment.*>$}}
16 // CHECK-NEXT: FullComment
17 // CHECK-NEXT: ParagraphComment
18 // CHECK-NEXT: TextComment{{.*}} Text=" Aaa"
24 // CHECK-NEXT: ParagraphComment
25 // CHECK-NEXT: TextComment{{.*}} Text=" Aaa"
32 // CHECK-NEXT: ParagraphComment
33 // CHECK-NEXT: TextComment{{.*}} Text=" xxx"
35 // CHECK-NEXT: ParagraphCommen
[all...] |
| /external/e2fsprogs/lib/ext2fs/ |
| kernel-list.h | 9 * sometimes we already know the next/prev entries and we can
15 struct list_head *next, *prev; member in struct:list_head
21 (ptr)->next = (ptr); (ptr)->prev = (ptr); \
32 * the prev/next entries already!
36 struct list_head * next)
38 next->prev = new;
39 new->next = next;
41 prev->next = new;
49 __list_add(new, head, head->next);
[all...] |
| /external/llvm/test/CodeGen/SPARC/ |
| LeonItinerariesUT.ll | 8 ; NO_ITIN-NEXT: ld
9 ; NO_ITIN-NEXT: ld
10 ; NO_ITIN-NEXT: ld
11 ; NO_ITIN-NEXT: fadds
12 ; NO_ITIN-NEXT: fsubs
13 ; NO_ITIN-NEXT: fmuls
14 ; NO_ITIN-NEXT: retl
15 ; NO_ITIN-NEXT: fdivs
19 ; LEON2_ITIN-NEXT: ld
20 ; LEON2_ITIN-NEXT: fadds
[all...] |
| /external/llvm/test/MC/ARM/ |
| directive-align.s | 10 @ CHECK-NEXT: .byte 1
11 @ CHECK-NEXT: .p2align 2
18 @ CHECK-NEXT: .long 487637477
19 @ CHECK-NEXT: .p2align 2
26 @ CHECK-NEXT: .long 3517645084
27 @ CHECK-NEXT: .p2align 2
|
| /external/llvm/test/Transforms/LoopUnroll/AArch64/ |
| partial.ll | 19 ; CHECK-NEXT: add
20 ; CHECK-NEXT: add
21 ; CHECK-NEXT: add
22 ; CHECK-NEXT: add
23 ; CHECK-NEXT: add
24 ; CHECK-NEXT: add
25 ; CHECK-NEXT: add
26 ; CHECK-NEXT: icmp
61 ; CHECK-NEXT: add
62 ; CHECK-NEXT: ad
[all...] |
| /external/llvm/test/tools/llvm-readobj/ARM/ |
| attribute-1.s | 7 @CHECK-OBJ-NEXT: Value: 1
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v4
14 @CHECK-OBJ-NEXT: Value: 1
15 @CHECK-OBJ-NEXT: TagName: ARM_ISA_use
16 @CHECK-OBJ-NEXT: Description: Permitted
21 @CHECK-OBJ-NEXT: Value: 1
22 @CHECK-OBJ-NEXT: TagName: THUMB_ISA_use
23 @CHECK-OBJ-NEXT: Description: Thumb-1
28 @CHECK-OBJ-NEXT: Value:
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/COFF/ |
| symbol-alias.s | 32 // CHECK-NEXT: Value = [[FOO_VALUE:.*$]]
33 // CHECK-NEXT: SectionNumber = [[FOO_SECTION_NUMBER:.*$]]
34 // CHECK-NEXT: SimpleType = [[FOO_SIMPLE_TYPE:.*$]]
35 // CHECK-NEXT: ComplexType = [[FOO_COMPLEX_TYPE:.*$]]
36 // CHECK-NEXT: StorageClass = [[FOO_STORAGE_CLASS:.*$]]
37 // CHECK-NEXT: NumberOfAuxSymbols = [[FOO_NUMBER_OF_AUX_SYMBOLS:.*$]]
40 // CHECK-NEXT: Value = [[BAR_VALUE:.*$]]
41 // CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER:.*$]]
42 // CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE:.*$]]
43 // CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE:.*$]]
[all...] |
| /external/compiler-rt/test/profile/ |
| instrprof-value-prof-2.c | 76 // CHECK-1-NEXT: Hash: 0x0000000000000000
77 // CHECK-1-NEXT: Counters:
78 // CHECK-1-NEXT: Function count
79 // CHECK-1-NEXT: Indirect Call Site Count: 10
80 // CHECK-1-NEXT: Indirect Target Results:
82 // CHECK-2-NEXT: Hash: 0x0000000000000000
83 // CHECK-2-NEXT: Counters:
84 // CHECK-2-NEXT: Function count:
85 // CHECK-2-NEXT: Indirect Call Site Count: 10
86 // CHECK-2-NEXT: Indirect Target Results:
[all...] |
