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  /toolchain/binutils/binutils-2.27/gas/doc/
c-m32r.texi 158 @code{.high} pseudo op is encountered without a matching @code{.low}
159 pseudo op. The presence of such an unmatched pseudo op usually
c-msp430.texi 320 additional pseudo-instructions are needed on this family.
335 We define new pseudo operation @samp{.profiler} which will instruct assembler to
339 Pseudo operation format:
  /external/llvm/lib/Target/SystemZ/
SystemZInstrFP.td 63 // vector support (via a pseudo to simplify instruction selection).
65 def LTEBRCompare_VecPseudo : Pseudo<(outs), (ins FP32:$R1, FP32:$R2), []>;
66 def LTDBRCompare_VecPseudo : Pseudo<(outs), (ins FP64:$R1, FP64:$R2), []>;
67 def LTXBRCompare_VecPseudo : Pseudo<(outs), (ins FP128:$R1, FP128:$R2), []>;
129 def LX : Pseudo<(outs FP128:$dst), (ins bdxaddr20only128:$src),
145 def STX : Pseudo<(outs), (ins FP128:$src, bdxaddr20only128:$dst),
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/
stdlib.h 909 /* X/Open pseudo terminal handling. */
912 /* Return a master pseudo-terminal handle. */
917 /* The next four functions all take a master pseudo-tty fd and
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  /dalvik/dx/src/com/android/dx/ssa/
ConstCollector.java 131 // Insert a block containing the move-result-pseudo insn.
183 // Find defining instruction for move-result-pseudo instructions
  /external/apache-commons-math/src/main/java/org/apache/commons/math/linear/
SingularValueDecompositionImpl.java 275 /** Pseudo-inverse of the initial matrix. */
370 * Get the pseudo-inverse of the decomposed matrix.
  /external/apache-commons-math/src/main/java/org/apache/commons/math/random/
MersenneTwister.java 24 /** This class implements a powerful pseudo-random number generator
37 * Twister: A 623-Dimensionally Equidistributed Uniform Pseudo-Random
package.html 21 <p>Commons-math provides a few pseudo random number generators. The top level interface is RandomGenerator.
49 A 623-Dimensionally Equidistributed Uniform Pseudo-Random Number Generator</a>, ACM
  /external/googletest/googlemock/scripts/generator/cpp/
gmock_class_test.py 51 # <test> is a pseudo-filename, it is not read or written.
319 # <test> is a pseudo-filename, it is not read or written.
  /external/icu/android_icu4j/src/main/tests/android/icu/dev/test/calendar/
TestCase.java 22 * A pseudo <code>Calendar</code> that is useful for testing
34 // Pseudo-Calendar fields and methods
  /external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/calendar/
TestCase.java 20 * A pseudo <code>Calendar</code> that is useful for testing
31 // Pseudo-Calendar fields and methods
  /external/libavc/encoder/
ih264e_mc.c 98 * pseudo prediction buffer
101 * pseudo pred buffer stride
  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGVLIW.cpp 243 // If this is a pseudo-op node, we don't want to increment the current
245 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
  /external/llvm/lib/Target/ARM/
ARMSelectionDAGInfo.cpp 161 // FIXME: We should invent a VMEMCPY pseudo-instruction that lowers to
166 // The number of MEMCPY pseudo-instructions to emit. We use up to
  /external/llvm/lib/Target/PowerPC/
PPCInstrInfo.h 55 PPC970_Pseudo = 0 << PPC970_Shift, // Pseudo instruction
272 // Lower pseudo instructions after register allocation.
  /external/llvm/lib/Target/X86/
X86WinAllocaExpander.cpp 1 //===----- X86WinAllocaExpander.cpp - Expand WinAlloca pseudo instruction -===//
10 // This file defines a pass that expands WinAlloca pseudo-instructions.
  /external/llvm/test/CodeGen/AArch64/
aarch64-dynamic-stack-layout.ll 103 ; Check correctness of cfi pseudo-instructions
125 ; Check correctness of cfi pseudo-instructions
190 ; Check correctness of cfi pseudo-instructions
218 ; Check correctness of cfi pseudo-instructions
294 ; Check correctness of cfi pseudo-instructions
346 ; Check correctness of cfi pseudo-instructions
400 ; Check correctness of cfi pseudo-instructions
446 ; Check correctness of cfi pseudo-instructions
  /external/mesa3d/src/compiler/glsl/
lower_packing_builtins.cpp 440 * This function generates IR that approximates the following pseudo-GLSL:
489 * This function generates IR that approximates the following pseudo-GLSL:
539 * This function generates IR that approximates the following pseudo-GLSL:
596 * This function generates IR that approximates the following pseudo-GLSL:
652 * This function generates IR that approximates the following pseudo-GLSL:
696 * This function generates IR that approximates the following pseudo-GLSL:
741 * This function generates IR that approximates the following pseudo-GLSL:
782 * This function generates IR that approximates the following pseudo-GLSL:
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  /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
ScheduleDAGList.cpp 229 // If this is a pseudo-op node, we don't want to increment the current
231 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
  /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
README.txt 13 This is handled by creating a pseudo-register NCC that aliases CC. Register
122 Similarly for the subreg pseudo-instructions:
  /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
SPUNodes.td 61 // SPU Vector shift pseudo-instruction type constraints
76 // Synthetic/pseudo-instructions
  /external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsCodeEmitter.cpp 238 // Skip pseudo instructions.
239 if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
  /external/swiftshader/third_party/LLVM/lib/Target/XCore/
XCoreRegisterInfo.cpp 114 // ADJCALLSTACKUP pseudo instructions
157 // Replace the pseudo instruction with a new instruction...
  /external/syslinux/gpxe/src/net/
ipv6.c 139 * This function constructs the pseudo header and completes the checksum in the
146 /* Calculate pseudo header */
  /external/tcpdump/
print-ip6.c 43 * This is used for UDP and TCP pseudo-header in the checksum
176 /* pseudo-header */

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