| /external/libxaac/decoder/armv7/ |
| ixheaacd_inv_dit_fft_8pt.s | 43 QADD r10, lr, r6
49 QADD r3, r12, r10
50 QSUB lr, r12, r10
79 QADD r10, lr, r11
89 QADD lr, r7, r10
90 QSUB r10, r7, r10
114 QADD r7, lr, r10
115 QSUB r10, lr, r10
[all...] |
| ixheaacd_post_radix_compute4.s | 53 ADD r9, r6, r10
54 SUB r6, r6, r10
56 ADD r10, r7, r11
62 ADD r12, r14, r10
63 SUB r14, r14, r10
65 ADD r10, r9, r11
76 STR r10, [r0], #14<<1
94 ADD r9, r6, r10
95 SUB r6, r6, r10
97 ADD r10, r7, r1
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
| opc-a.pl | 12 adds r20 = 0, r10
13 (p1) adds r21 = 1, r10
14 adds r22 = -1, r10
15 adds r23 = -0x2000, r10
16 (p2) adds r24 = 0x1FFF, r10
26 add r11 = 0, r10
27 add r12 = 0x1234, r10
31 addp4 r20 = r3, r10
32 (p1) addp4 r21 = 1, r10
33 addp4 r22 = -1, r10
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| swiftself.ll | 3 ; Parameter with swiftself should be allocated to r10.
5 ; CHECK: lgr %r2, %r10
10 ; Check that r10 is used to pass a swiftself argument.
12 ; CHECK: lgr %r10, %r2
19 ; r10 should be saved by the callee even if used for swiftself
21 ; CHECK: stmg %r10,
23 ; CHECK: lmg %r10,
26 call void asm sideeffect "", "~{r10}"()
33 ; CHECK-NOT: lg{{.*}}r10,
35 ; CHECK-NOT: lg{{.*}}r10,
[all...] |
| /external/valgrind/none/tests/arm/ |
| v8memory_a.c | 69 // INSN must mention the following reg as containing the EA: r10
74 // r10 pointing to middle of memory area
76 // Out: memory area, r2, r3, r6, r9, r10
81 // r2, r3 r6 r9 r10
91 /* 0:r2 1:r3 2:r6 3:r9 4:r10 */ \
99 "ldr r10, [%0, #16] ; " \
105 "str r10, [%0, #16] ; " \
106 : : "r"(&block1[0]) : "r2", "r3", "r4", "r5", "r6", "r9", "r10", \
109 printf("%s with r10 = middle_of_block\n", INSN); \
115 printf(" %08x r10 (xor, addr intreg #1)\n", block1[4] ^ block2[4]);
[all...] |
| v8memory_t.c | 69 // INSN must mention the following reg as containing the EA: r10
74 // r10 pointing to middle of memory area
76 // Out: memory area, r2, r3, r6, r9, r10
81 // r2, r3 r6 r9 r10
91 /* 0:r2 1:r3 2:r6 3:r9 4:r10 */ \
99 "ldr r10, [%0, #16] ; " \
105 "str r10, [%0, #16] ; " \
106 : : "r"(&block1[0]) : "r2", "r3", "r4", "r5", "r6", "r9", "r10", \
109 printf("%s with r10 = middle_of_block\n", INSN); \
115 printf(" %08x r10 (xor, addr intreg #1)\n", block1[4] ^ block2[4]);
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cr16/ |
| jcc_test.s | 16 jlo (r10,r9)
17 jhi (r11,r10)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cris/ |
| pushpopv32.s | 6 move.d r10,[sp]
9 move.d [sp+],r10
|
| rd-regprefix-1.s | 8 move.d $r4,[r10+1]
9 jsr r10
16 move.d $r4,[$r0+$r10.b]
24 move.d r4,[r0+r10.d]
31 move.d $r4,[r10+1]
32 jsr r10
40 move.d $r4,[r10+1]
41 jsr r10
|
| rd-tls-2.s | 6 move.d [r3+extsym:TPOFFGOT],r10
9 move.d [r3+extsym:GDGOTREL],r10
10 move.d [r13+extsym13:TPOFFGOT16],r10
11 move.w extsym14:GDGOTREL16,r10
16 sub.d [r3+extsym3:TPOFFGOT],r4,r10
19 add.d [r10+extsym3:TPOFFGOT+56],r7,r8
21 add.d [r10+extsym3:TPOFFGOT-560],r4,r8
26 add.d [r10+extsym3:GDGOTREL+56],r7,r8
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
| esa-z900.s | 37 lrv %r6,4095(%r5,%r10)
38 lrvh %r6,4095(%r5,%r10)
39 strv %r6,4095(%r5,%r10)
40 strvh %r6,4095(%r5,%r10)
41 ml %r6,4095(%r5,%r10)
42 dl %r6,4095(%r5,%r10)
43 alc %r6,4095(%r5,%r10)
44 slb %r6,4095(%r5,%r10)
|
| zarch-z990.d | 9 .*: e3 65 a0 00 80 08 [ ]*ag %r6,-524288\(%r5,%r10\)
10 .*: e3 65 a0 00 80 18 [ ]*agf %r6,-524288\(%r5,%r10\)
11 .*: e3 65 a0 00 80 7a [ ]*ahy %r6,-524288\(%r5,%r10\)
12 .*: e3 65 a0 00 80 98 [ ]*alc %r6,-524288\(%r5,%r10\)
13 .*: e3 65 a0 00 80 88 [ ]*alcg %r6,-524288\(%r5,%r10\)
14 .*: e3 65 a0 00 80 0a [ ]*alg %r6,-524288\(%r5,%r10\)
15 .*: e3 65 a0 00 80 1a [ ]*algf %r6,-524288\(%r5,%r10\)
16 .*: e3 65 a0 00 80 5e [ ]*aly %r6,-524288\(%r5,%r10\)
17 .*: e3 65 a0 00 80 5a [ ]*ay %r6,-524288\(%r5,%r10\)
23 .*: e3 65 a0 00 80 20 [ ]*cg %r6,-524288\(%r5,%r10\)
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/v850/ |
| split-lo16.s | 9 ld.w lo(0)[r0], r10
10 ld.w lo(0x12345678)[r0], r10
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-cris/ |
| tls-le-13.s | 6 move.d x1:TPOFF,$r10
7 move.d x2:TPOFF,$r10
|
| tls-le-13s.s | 6 move.w x1:TPOFF16,$r10
7 move.w x2:TPOFF16,$r10
|
| /external/vixl/test/aarch32/ |
| test-macro-assembler-cond-rd-rn-a32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
97 {{vs, r10, r8}, "vs, r10, r8", "vs_r10_r8"},
106 {{cc, r4, r10}, "cc, r4, r10", "cc_r4_r10"},
111 {{ls, r10, r10}, "ls, r10, r10", "ls_r10_r10"}
[all...] |
| test-macro-assembler-cond-rd-rn-t32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
97 {{vs, r10, r8}, "vs, r10, r8", "vs_r10_r8"},
106 {{cc, r4, r10}, "cc, r4, r10", "cc_r4_r10"},
111 {{ls, r10, r10}, "ls, r10, r10", "ls_r10_r10"}
[all...] |
| test-assembler-rd-rn-rm-a32.cc | 100 {{{r2, r10, r12}, false, al, "r2 r10 r12", "r2_r10_r12"},
108 {{r4, r5, r10}, false, al, "r4 r5 r10", "r4_r5_r10"},
114 {{r10, r14, r3}, false, al, "r10 r14 r3", "r10_r14_r3"},
116 {{r12, r10, r12}, false, al, "r12 r10 r12", "r12_r10_r12"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"}
[all...] |
| test-assembler-rd-rn-rm-t32.cc | 100 {{{r2, r10, r12}, false, al, "r2 r10 r12", "r2_r10_r12"},
108 {{r4, r5, r10}, false, al, "r4 r5 r10", "r4_r5_r10"},
114 {{r10, r14, r3}, false, al, "r10 r14 r3", "r10_r14_r3"},
116 {{r12, r10, r12}, false, al, "r12 r10 r12", "r12_r10_r12"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"}
[all...] |
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| sha1-armv4-large.S | 32 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
44 ldrb r10,[r1,#2]
49 orr r9,r9,r10,lsl#8
50 eor r10,r5,r6 @ F_xx_xx
57 eor r10,r5,r6 @ F_xx_xx
63 and r10,r4,r10,ror#2
65 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D)
67 add r7,r7,r10 @ E+=F_00_19(B,C,D
[all...] |
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| sha1-armv4-large.S | 31 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
43 ldrb r10,[r1,#2]
48 orr r9,r9,r10,lsl#8
49 eor r10,r5,r6 @ F_xx_xx
56 eor r10,r5,r6 @ F_xx_xx
62 and r10,r4,r10,ror#2
64 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D)
66 add r7,r7,r10 @ E+=F_00_19(B,C,D
[all...] |
| /prebuilts/go/darwin-x86/src/runtime/ |
| sys_solaris_amd64.s | 79 MOVQ libcall_n(DI), R10
173 MOVQ g(BX), R10
174 CMPQ R10, $0
190 MOVQ g_m(R10), BP
192 MOVQ libcall_fn(R11), R10
193 MOVQ R10, 88(SP)
194 MOVQ libcall_args(R11), R10
195 MOVQ R10, 96(SP)
196 MOVQ libcall_n(R11), R10
197 MOVQ R10, 104(SP
[all...] |
| /prebuilts/go/linux-x86/src/runtime/ |
| sys_solaris_amd64.s | 79 MOVQ libcall_n(DI), R10
173 MOVQ g(BX), R10
174 CMPQ R10, $0
190 MOVQ g_m(R10), BP
192 MOVQ libcall_fn(R11), R10
193 MOVQ R10, 88(SP)
194 MOVQ libcall_args(R11), R10
195 MOVQ R10, 96(SP)
196 MOVQ libcall_n(R11), R10
197 MOVQ R10, 104(SP
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/ |
| setjmp.s | 35 add r10 = 0x10*20, in0
38 st8.spill.nta [r10] = r4, 8
42 st8.spill.nta [r10] = r5, 8
46 st8.spill.nta [r10] = r6, 8
50 st8.spill.nta [r10] = r7, 8
54 st8.spill.nta [r10] = sp, 8
58 st8.nta [r10] = loc1, 8
62 st8.nta [r10] = r21, 8
66 st8.nta [r10] = r22, 8
69 st8.nta [r10] = r23, 8
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
| SetJmp.s | 34 add r10 = 0x10*20, in0
37 st8.spill.nta [r10] = r4, 8
41 st8.spill.nta [r10] = r5, 8
45 st8.spill.nta [r10] = r6, 8
49 st8.spill.nta [r10] = r7, 8
53 st8.spill.nta [r10] = sp, 8
57 st8.nta [r10] = loc1, 8
61 st8.nta [r10] = r21, 8
65 st8.nta [r10] = r22, 8
68 st8.nta [r10] = r23, 8
[all...] |
