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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/
mips-gp64-fp32-pic.s 118 # 0190 sltiu a0,a0,1
mips-gp64-fp32.d 67 e0: 2c840001 sltiu a0,a0,1
mips-gp64-fp32.s 71 # 00e0 sltiu a0,a0,1
mips-gp64-fp64-pic.d 92 148: 2c840001 sltiu a0,a0,1
mips-gp64-fp64-pic.s 118 # 0190 sltiu a0,a0,1
mips-gp64-fp64.d 67 e0: 2c840001 sltiu a0,a0,1
mips-gp64-fp64.s 71 # 00e0 sltiu a0,a0,1
  /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
vector-icmp.ll 31 ; MIPS32: sltiu [[T4]],[[T4]],1
33 ; MIPS32: sltiu [[T5]],[[T5]],1
35 ; MIPS32: sltiu [[T6]],[[T6]],1
37 ; MIPS32: sltiu [[T7]],[[T7]],1
69 ; MIPS32: sltiu [[T4]],[[T4]],1
71 ; MIPS32: sltiu [[T5]],[[T5]],1
73 ; MIPS32: sltiu [[T6]],[[T6]],1
75 ; MIPS32: sltiu [[T7]],[[T7]],1
290 ; MIPS32: sltiu [[T4]],[[T4]],1
296 ; MIPS32: sltiu [[T5]],[[T5]],
    [all...]
cond-branch.ll 28 ; MIPS32-OM1: sltiu {{.*}}, {{.*}}, 1
  /external/llvm/test/CodeGen/Mips/
cmov.ll 540 ; sltiu instructions.
546 ; 32-CMOV-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
551 ; 32-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
559 ; 64-CMOV-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
564 ; 64-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
620 ; 32-CMOV-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
625 ; 32-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
633 ; 64-CMOV-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
638 ; 64-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
  /external/llvm/test/CodeGen/Mips/Fast-ISel/
icmpa.ll 26 ; CHECK: sltiu $[[REG2:[0-9]+]], $[[REG1]], 1
27 ; FIXME: This instruction is redundant. The sltiu can only produce 0 and 1.
  /external/llvm/test/MC/Disassembler/Mips/mips1/
valid-mips1-el.txt 91 0x55 0xc3 0x39 0x2f # CHECK: sltiu $25, $25, -15531
93 0x55 0xc3 0x38 0x2f # CHECK: sltiu $24, $25, -15531
valid-mips1.txt 61 0x2f 0x38 0xc3 0x55 # CHECK: sltiu $24, $25, -15531
62 0x2f 0x39 0xc3 0x55 # CHECK: sltiu $25, $25, -15531
  /external/llvm/test/MC/Disassembler/Mips/mips2/
valid-mips2-el.txt 111 0x55 0xc3 0x39 0x2f # CHECK: sltiu $25, $25, -15531
113 0x55 0xc3 0x38 0x2f # CHECK: sltiu $24, $25, -15531
  /external/llvm/test/MC/Mips/
mips-alu-instructions.s 26 # CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
57 sltiu $3, $3, 103
mips64-alu-instructions.s 24 # CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
52 sltiu $3, $3, 103
instalias-imm-expanding.s 217 # CHECK: sltiu $4, $5, -32768 # encoding: [0x00,0x80,0xa4,0x2c]
219 # CHECK: sltiu $4, $5, 0 # encoding: [0x00,0x00,0xa4,0x2c]
226 # CHECK: sltiu $4, $5, -1 # encoding: [0xff,0xff,0xa4,0x2c]
  /external/pcre/dist2/src/sljit/
sljitNativeMIPS_32.c 243 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG));
282 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG));
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/iq2000/
allinsn.d 69 00000050 <sltiu>:
70 50: 2c 00 00 00 sltiu r0,r0,0x0
  /external/valgrind/none/tests/mips32/
MIPS32int.stdout.exp-mips32-BE     [all...]
MIPS32int.stdout.exp-mips32-LE     [all...]
  /external/webp/src/dsp/
cost_mips32.c 54 "sltiu %[temp0], %[v_reg], 2 \n\t"
  /system/core/libpixelflinger/tests/arch-mips64/disassembler/
mips64_disassembler_test.cpp 103 { 0x2c850020, "sltiu\ta1,a0,32" },
  /external/llvm/test/MC/Mips/mips2/
valid.s 122 sltiu $25,$25,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
124 sltu $24,$25,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
  /external/llvm/test/MC/Mips/mips3/
valid.s 187 sltiu $25,$25,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
189 sltu $24,$25,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]

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