| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| mrs-msr-arm-v6.s | 7 mrs r6, spsr
10 msr spsr, #0x10000000
13 msr spsr, r6
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| mrs-msr-arm-v7-a.s | 7 mrs r6, spsr
10 msr spsr, #0x10000000
13 msr spsr, r6
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| mrs-msr-thumb-v6t2.s | 7 mrs r6, spsr
10 msr spsr, r6
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| mrs-msr-thumb-v7-m-bad.s | 6 mrs r5, spsr
12 msr spsr, r8
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| arm6.s | 5 mrs r2, spsr
13 mrs r2, SPSR
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| mrs-msr-arm-v7-a-bad.l | 2 [^:]*:5: Error: 'APSR', 'CPSR' or 'SPSR' expected -- `mrs r4,apsr_nzcvq'
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| arm6.d | 9 0+04 <[^>]+> e14f2000 ? mrs r2, SPSR
15 0+1c <[^>]+> e14f2000 ? mrs r2, SPSR
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| mrs-msr-thumb-v7-m-bad.l | 3 [^:]*:6: Error: selected processor does not support requested special purpose register -- `mrs r5,spsr'
9 [^:]*:12: Error: selected processor does not support requested special purpose register -- `msr spsr,r8'
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| mrs-msr-arm-v6.d | 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
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| mrs-msr-arm-v7-a.d | 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
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| mrs-msr-thumb-v6t2.d | 12 0+08 <[^>]*> f3ff 8600 mrs r6, SPSR
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/ |
| arm_common.c | 99 * Gets SPSR for BL32 entry
105 * setting the SPSR prior to entry into the BL32 image.
111 * Gets SPSR for BL33 entry
117 uint32_t spsr; local
123 * TODO: Consider the possibility of specifying the SPSR in
127 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
128 return spsr;
132 * Gets SPSR for BL33 entry
136 unsigned int hyp_status, mode, spsr; local
143 * TODO: Consider the possibility of specifying the SPSR i
[all...] |
| execution_state_switch.c | 43 u_register_t spsr, pc, scr, sctlr; local
56 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3);
57 caller_64 = (GET_RW(spsr) == MODE_RW_64);
88 from_el2 = caller_64 ? (GET_EL(spsr) == MODE_EL2) :
89 (GET_M32(spsr) == MODE32_hyp);
110 /* Construct SPSR for the exception state we're about to switch to */
124 spsr = SPSR_MODE32(el, thumb ? SPSR_T_THUMB : SPSR_T_ARM,
133 spsr = SPSR_64(el, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
146 ep.spsr = spsr;
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/ |
| qemu_bl2_setup.c | 195 * Gets SPSR for BL32 entry
201 * setting the SPSR prior to entry into the BL3-2 image.
207 * Gets SPSR for BL33 entry
212 uint32_t spsr; local
218 * TODO: Consider the possibility of specifying the SPSR in
222 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
223 return spsr;
261 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry();
267 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
288 * the entrypoint of BL3-1 and set SPSR and security state
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| hikey_bl2_setup.c | 113 * Gets SPSR for BL32 entry
119 * setting the SPSR prior to entry into the BL3-2 image.
125 * Gets SPSR for BL33 entry
131 uint32_t spsr; local
137 * TODO: Consider the possibility of specifying the SPSR in
141 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
142 return spsr;
147 unsigned int hyp_status, mode, spsr; local
154 * TODO: Consider the possibility of specifying the SPSR in
158 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| hikey960_bl2_setup.c | 190 * Gets SPSR for BL32 entry
196 * setting the SPSR prior to entry into the BL3-2 image.
202 * Gets SPSR for BL33 entry
208 uint32_t spsr; local
214 * TODO: Consider the possibility of specifying the SPSR in
218 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
219 return spsr;
224 unsigned int hyp_status, mode, spsr; local
231 * TODO: Consider the possibility of specifying the SPSR in
235 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/ |
| smcc_macros.S | 13 * spsr, lr, sp registers and the `scr` register to the SMC context on entry
25 /* Save the banked registers including the current SPSR and LR */
45 mrs r12, spsr
83 /* Restore the banked registers including the current SPSR */
107 * to update all the 32 bits of SPSR. Else, by default, the
109 * f->[31:24] and c->[7:0] bits of SPSR.
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/ |
| bl2_plat_setup.c | 88 bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
96 uint32_t spsr; local
105 * TODO: Consider the possibility of specifying the SPSR in
109 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
110 return spsr;
117 bl33_ep_info->spsr = hisi_get_spsr_for_bl33_entry();
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| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/common/ |
| mtk_plat_common.c | 102 uint32_t spsr; local
115 spsr = SPSR_MODE32(mode, 0, ee, daif);
116 return spsr;
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| /device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/ |
| uniphier_image_desc.c | 41 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
63 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
81 .ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
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| /device/linaro/bootloader/arm-trusted-firmware/bl1/aarch64/ |
| bl1_context_mgmt.c | 73 /* Prepare the SPSR for the next BL image. */
75 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
80 next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
83 next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/juno/ |
| juno_bl2_setup.c | 14 * This function changes the spsr for BL32 image to bypass
26 bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
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| /device/linaro/bootloader/arm-trusted-firmware/bl1/aarch32/ |
| bl1_context_mgmt.c | 66 * Following function copies GP regs r0-r4, lr and spsr,
117 /* Prepare the SPSR for the next BL image. */
119 next_bl_ep->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
124 next_bl_ep->spsr = SPSR_MODE32(MODE32_hyp, SPSR_T_ARM,
127 next_bl_ep->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
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| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/ |
| tlkd_common.c | 82 uint32_t ep_attr, spsr; local
95 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
97 spsr = SPSR_MODE32(MODE32_svc,
109 tlk_entry_point->spsr = spsr;
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| /device/linaro/bootloader/arm-trusted-firmware/include/common/ |
| ep_info.h | 87 * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
94 uint32_t spsr; member in struct:entry_point_info
116 __builtin_offsetof(entry_point_info_t, spsr) - \
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