| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 207 "SXTB",
|
| list7.go | 163 return fmt.Sprintf("R%d.SXTB<<%d", r&31, (r>>5)&7)
165 return fmt.Sprintf("R%d.SXTB", r&31)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| programmer-friendly.s | 53 adds x0, sp, x0, sxtb #0
|
| bitfield-bfm.s | 91 ext2bfm s, w, 7 // sxtb wzr, w7
92 ext2bfm s, x, 7 // sxtb xzr, x7
|
| bitfield-dump | 6 0: 13001cff sxtb wzr, w7
7 4: 93401cff sxtb xzr, w7
|
| /external/llvm/test/CodeGen/AArch64/ |
| fast-isel-int-ext3.ll | 66 ; CHECK: sxtb w0, [[REG]]
88 ; CHECK: sxtb x0, [[REG]]
|
| arm64-shifted-sext.ll | 45 ; CHECK: sxtb [[REG]], [[REG]]
91 ; CHECK: sxtb [[REG]], [[REG]]
136 ; CHECK: sxtb x[[REG]], w[[REG]]
|
| bitfield.ll | 11 ; CHECK: sxtb {{w[0-9]+}}, {{w[0-9]+}}
27 ; CHECK: sxtb {{x[0-9]+}}, {{w[0-9]+}}
144 ; CHECK: sxtb {{x[0-9]+}}, {{w[0-9]+}}
|
| arm64-fast-isel-conversion-fallback.ll | 40 ; CHECK: sxtb w0, w0
|
| fast-isel-int-ext.ll | 208 ; CHECK-NOT: sxtb
230 ; CHECK-NOT: sxtb
319 ; CHECK-NOT: sxtb
341 ; CHECK-NOT: sxtb
435 ; CHECK-NOT: sxtb
459 ; CHECK-NOT: sxtb
|
| arm64-narrow-ldst-merge.ll | 140 ; CHECK-DAG: sxtb [[LO_PART:w[0-9]+]], [[NEW_DEST]]
159 ; BE-DAG: sxtb [[LO_PART:w[0-9]+]], [[NEW_DEST]]
176 ; LE-DAG: sxtb [[LO_PART:w[0-9]+]], [[NEW_DEST]]
268 ; CHECK-DAG: sxtb [[HI_PART:w[0-9]+]], [[NEW_DEST]]
285 ; LE-DAG: sxtb [[HI_PART:w[0-9]+]], [[NEW_DEST]]
306 ; BE-DAG: sxtb [[HI_PART:w[0-9]+]], [[NEW_DEST]]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| fast-isel.ll | 103 ; THUMB: sxtb
107 ; ARM: sxtb
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| archv6.s | 141 sxtb r2, r5
142 sxtb r2, r5, ROR #8
|
| thumb32.s | 729 sxtb r0, r0
730 sxtb r0, r0, ror #0
731 sxtb r5, r0
732 sxtb r0, r5
733 sxtb.w r1, r2
734 sxtb r1, r2, ror #8
735 sxtb r1, r2, ror #16
736 sxtb r1, r2, ror #24
|
| t16-bad.s | 43 ar2r sxtb
|
| thumb2_bad_reg.s | 715 @ SXTB
716 sxtb r13, r0
717 sxtb r15, r0
718 sxtb r0, r13
719 sxtb r0, r15
|
| /external/llvm/test/CodeGen/Hexagon/intrinsics/ |
| alu32_alu.ll | 81 declare i32 @llvm.hexagon.A2.sxtb(i32)
83 %z = call i32 @llvm.hexagon.A2.sxtb(i32 %a)
86 ; CHECK: = sxtb({{.*}})
|
| /art/compiler/optimizing/ |
| nodes_shared.cc | 83 case HDataProcWithShifterOp::kSXTB: return os << "SXTB";
|
| /external/llvm/test/MC/Disassembler/Hexagon/ |
| alu32_alu.txt | 42 # CHECK: r17 = sxtb(r31)
|
| /external/v8/src/compiler/arm64/ |
| instruction-codes-arm64.h | 180 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \
|
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel.ll | 104 ; THUMB: sxtb
108 ; ARM: sxtb
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-arithmetic.txt | 177 # CHECK: add w1, w2, w3, sxtb
192 # CHECK: add x1, x2, w3, sxtb
219 # CHECK: sub w1, w2, w3, sxtb
234 # CHECK: sub x1, x2, w3, sxtb
261 # CHECK: adds w1, w2, w3, sxtb
276 # CHECK: adds x1, x2, w3, sxtb
299 # CHECK: subs w1, w2, w3, sxtb
314 # CHECK: subs x1, x2, w3, sxtb
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| list7.go | 163 return fmt.Sprintf("R%d.SXTB<<%d", r&31, (r>>5)&7)
165 return fmt.Sprintf("R%d.SXTB", r&31)
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 45 SXTB,
64 case AArch64_AM::SXTB: return "sxtb";
131 case 4: return AArch64_AM::SXTB;
147 /// 100 ==> sxtb
158 case AArch64_AM::SXTB: return 4; break;
194 /// 100 ==> sxtb
|
| /external/libavc/common/arm/ |
| ih264_weighted_bi_pred_a9q.s | 143 sxtb r7, r7 @sign-extend 16-bit wt1 to 32-bit
146 sxtb r9, r9 @sign-extend 8-bit ofst1 to 32-bit
154 sxtb r8, r8 @sign-extend 16-bit wt2 to 32-bit
157 sxtb r10, r10 @sign-extend 8-bit ofst2 to 32-bit
471 sxtb r9, r9 @sign-extend 8-bit ofst1_u to 32-bit
472 sxtb r10, r10 @sign-extend 8-bit ofst2_u to 32-bit
473 sxtb r7, r7 @sign-extend 8-bit ofst1_v to 32-bit
474 sxtb r8, r8 @sign-extend 8-bit ofst2_v to 32-bit
|
