| /system/core/libpixelflinger/codeflinger/ |
| Arm64Disassembler.cpp | 206 "reserved","reserved", "sxtw", "sxtx"
215 "sxtb","sxth","sxtw","sxtx"
|
| /external/libavc/common/armv8/ |
| ih264_intra_pred_chroma_av8.s | 116 sxtw x3, w3
267 sxtw x3, w3
347 sxtw x3, w3
420 sxtw x3, w3
|
| ih264_intra_pred_luma_16x16_av8.s | 111 sxtw x3, w3
196 sxtw x3, w3
300 sxtw x3, w3
425 sxtw x3, w3
|
| ih264_iquant_itrans_recon_av8.s | 122 sxtw x3, w3
123 sxtw x4, w4
128 sxtw x8, w8
320 sxtw x3, w3
321 sxtw x4, w4
532 sxtw x3, w3
533 sxtw x4, w4
|
| ih264_weighted_bi_pred_av8.s | 141 sxtw x3, w3
142 sxtw x4, w4
143 sxtw x5, w5
422 sxtw x3, w3
423 sxtw x4, w4
424 sxtw x5, w5
|
| ih264_deblk_chroma_av8.s | 90 sxtw x1, w1
190 sxtw x1, w1
337 sxtw x1, w1
472 sxtw x1, w1
|
| ih264_inter_pred_filters_luma_vert_av8.s | 111 sxtw x2, w2
112 sxtw x3, w3
113 sxtw x4, w4
114 sxtw x5, w5
|
| ih264_inter_pred_luma_vert_qpel_av8.s | 115 sxtw x2, w2
116 sxtw x3, w3
117 sxtw x4, w4
118 sxtw x5, w5
|
| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_chroma_mode_3_to_9.s | 121 sxtw x7,w7
146 sxtw x9,w9
303 sxtw x9,w9
362 sxtw x9,w9
|
| ihevc_intra_pred_luma_mode_3_to_9.s | 122 sxtw x7,w7
154 sxtw x9,w9
299 sxtw x9,w9
360 sxtw x9,w9
488 sxtw x9,w9
|
| ihevc_intra_pred_luma_planar.s | 127 sxtw x7,w7
134 sxtw x7,w7
536 sxtw x7,w7
|
| /external/llvm/test/CodeGen/AArch64/ |
| fast-isel-int-ext3.ll | 110 ; CHECK: sxtw x0, [[REG]]
|
| cond-sel.ll | 21 ; CHECK: sxtw [[EXT_RHS:x[0-9]+]], {{[wx]}}[[RHS:[0-9]+]]
22 ; CHECK: cmp [[LHS:x[0-9]+]], w[[RHS]], sxtw
|
| /external/vixl/doc/ |
| changelog.md | 111 + Fixed sign extension for W->X conversions using `sxtb`, `sxth` and `sxtw`.
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| addsub.s | 102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
|
| bitfield-bfm.s | 95 ext2bfm s, x, 31 // sxtw xzr, x7
|
| /external/capstone/suite/MC/AArch64/ |
| basic-a64-instructions.s.cs | 8 0x5f,0xc0,0x23,0x8b = add sp, x2, w3, sxtw
16 0x40,0xc0,0x23,0x0b = add w0, w2, w3, sxtw
28 0x5f,0xc0,0x23,0xcb = sub sp, x2, w3, sxtw
36 0x5f,0xc0,0x23,0x4b = sub wsp, w2, w3, sxtw
44 0x5f,0xc0,0x23,0xab = adds xzr, x2, w3, sxtw
52 0x5f,0xc0,0x23,0x2b = adds wzr, w2, w3, sxtw
60 0x5f,0xc0,0x23,0xeb = subs xzr, x2, w3, sxtw
68 0x5f,0xc0,0x23,0x6b = subs wzr, w2, w3, sxtw
76 0x5f,0xc0,0x23,0xeb = cmp x2, w3, sxtw
84 0x5f,0xc0,0x23,0x6b = cmp w2, w3, sxtw
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-instructions.s | 24 add sp, x2, w3, sxtw
32 // CHECK: add sp, x2, w3, sxtw // encoding: [0x5f,0xc0,0x23,0x8b]
42 add w0, w2, w3, sxtw
50 // CHECK: add w0, w2, w3, sxtw // encoding: [0x40,0xc0,0x23,0x0b]
70 sub sp, x2, w3, sxtw
78 // CHECK: sub sp, x2, w3, sxtw // encoding: [0x5f,0xc0,0x23,0xcb]
87 sub wsp, w2, w3, sxtw
95 // CHECK: sub wsp, w2, w3, sxtw // encoding: [0x5f,0xc0,0x23,0x4b]
105 adds xzr, x2, w3, sxtw
113 // CHECK: {{adds xzr,|cmn}} x2, w3, sxtw // encoding: [0x5f,0xc0,0x23,0xab
[all...] |
| arm64-leaf-compact-unwind.s | 217 add x8, x8, w5, sxtw #2
|
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 407 VIXL_ASSERT((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
468 VIXL_ASSERT((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| inst.go | 407 sxtw
435 case sxtw:
436 return "SXTW"
406 sxtw const
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| inst.go | 407 sxtw
435 case sxtw:
436 return "SXTW"
406 sxtw const
|
| /external/v8/src/crankshaft/arm64/ |
| lithium-codegen-arm64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | [all...] |
| /art/runtime/interpreter/mterp/arm64/ |
| footer.S | 236 sxtw x2, wINST
|
