| /external/llvm/test/CodeGen/X86/ |
| 2007-04-24-Huge-Stack.ll | 13 %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; <i8*> [#uses=1]
14 ret i8* %tmp4
|
| 2007-04-27-InlineAsm-IntMemInput.ll | 9 %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1]
10 ret i32 %tmp4
|
| 2007-07-18-Vector-Extract.ll | 15 %tmp4 = load i64, i64* %tmp2.gep ; <i64> [#uses=1]
16 ret i64 %tmp4
|
| avx1-logical-load-folding.ll | 11 %tmp4 = and <8 x i32> %tmp3, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
12 %tmp5 = bitcast <8 x i32> %tmp4 to <8 x float>
25 %tmp4 = or <8 x i32> %tmp3, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
26 %tmp5 = bitcast <8 x i32> %tmp4 to <8 x float>
39 %tmp4 = xor <8 x i32> %tmp3, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
40 %tmp5 = bitcast <8 x i32> %tmp4 to <8 x float>
52 %tmp4 = xor <8 x i32> %tmp3, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
53 %tmp5 = and <8 x i32> %tmp4, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
|
| inline-asm-x-scalar.ll | 20 %tmp4 = fsub float %tmp1, 0x3810000000000000 ; <float> [#uses=1]
21 tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 )
|
| tailcallbyval.ll | 17 %tmp4 = tail call fastcc i32 @tailcallee(%struct.s* byval %a )
18 ret i32 %tmp4
|
| x86-64-gv-offset.ll | 9 %tmp4 = load double, double* getelementptr (%struct.x, %struct.x* @X, i32 0, i32 1), align 8 ; <double> [#uses=1]
10 tail call void @t( float %tmp2, double %tmp4 ) nounwind
|
| /external/llvm/test/Transforms/GVN/ |
| 2008-02-12-UndefLoad.ll | 13 %tmp4 = and i32 %tmp3, -21 ; <i32> [#uses=1]
14 store i32 %tmp4, i32* %tmp1, align 4
|
| /external/llvm/test/Transforms/Reassociate/ |
| secondary.ll | 17 %tmp4 = add i32 %tmp3, 2014710503
19 %tmp6 = sub i32 %tmp4, %tmp5
|
| /external/swiftshader/third_party/LLVM/test/Analysis/BasicAA/ |
| 2007-10-24-ArgumentsGlobals.ll | 10 %tmp4 = getelementptr %struct.A* %b, i32 0, i32 0 ;<i32*> [#uses=1]
11 store i32 0, i32* %tmp4, align 4
|
| /external/swiftshader/third_party/LLVM/test/Analysis/ScalarEvolution/ |
| 2007-09-27-LargeStepping.ll | 11 %tmp4 = add i32 %i.0, 268435456 ; <i32> [#uses=1]
16 %i.0 = phi i32 [ -1879048192, %entry ], [ %tmp4, %bb ] ; <i32> [#uses=2]
|
| 2008-05-25-NegativeStepToZero.ll | 11 %tmp4 = add i8 %x.0, -4 ; <i8> [#uses=1]
15 %x.0 = phi i8 [ 0, %entry ], [ %tmp4, %bb ] ; <i8> [#uses=2]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| ifcvt6.ll | 8 %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
9 %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
|
| ldr_pre.ll | 15 %tmp4 = sub i32 %tmp1, %c ; <i32> [#uses=1]
16 %tmp5 = add i32 %tmp4, %tmp3 ; <i32> [#uses=1]
|
| uxtb.ll | 36 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
37 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
45 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
46 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
61 %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1]
62 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
70 %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1]
71 %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| 2007-05-30-dagcombine-miscomp.ll | 10 %tmp4 = shl i8 %tmp23, 1 ; <i8> [#uses=1]
11 %tmp5 = and i8 %tmp4, 2 ; <i8> [#uses=1]
|
| and-branch.ll | 7 %tmp4 = and i1 %tmp3, %tmp ; <i1> [#uses=1]
8 br i1 %tmp4, label %cond_true, label %UnifiedReturnBlock
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-rev.ll | 19 %tmp4 = shl i16 %tmp3, 8
20 %tmp5 = or i16 %tmp2, %tmp4
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| 2006-05-17-VectorArg.ll | 9 %tmp4 = fdiv float 1.000000e+00, %tmp3 ; <float> [#uses=1]
10 %tmp11 = insertelement <4 x float> zeroinitializer, float %tmp4, i32 3 ; <<4 x float>> [#uses=1]
|
| 2007-04-24-Huge-Stack.ll | 11 %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; <i8*> [#uses=1]
12 ret i8* %tmp4
|
| 2007-04-27-InlineAsm-IntMemInput.ll | 9 %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1]
10 ret i32 %tmp4
|
| 2007-07-18-Vector-Extract.ll | 15 %tmp4 = load i64* %tmp2.gep ; <i64> [#uses=1]
16 ret i64 %tmp4
|
| fastcc-sret.ll | 18 %tmp4 = getelementptr %struct.foo* %memtmp, i32 0, i32 0
19 %tmp5 = getelementptr [4 x i32]* %tmp4, i32 0, i32 0
|
| inline-asm-x-scalar.ll | 20 %tmp4 = fsub float %tmp1, 0x3810000000000000 ; <float> [#uses=1]
21 tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 )
|
| or-branch.ll | 8 %tmp4 = or i1 %tmp3, %tmp.upgrd.1 ; <i1> [#uses=1]
9 br i1 %tmp4, label %cond_true, label %UnifiedReturnBlock
|
