| /external/llvm/test/CodeGen/AArch64/ |
| arm64-addr-type-promotion.ll | 54 %tmp4 = load i8, i8* %arrayidx14, align 1
55 %cmp17 = icmp eq i8 %tmp3, %tmp4
59 %cmp22 = icmp ugt i8 %tmp3, %tmp4
|
| arm64-dup.ll | 9 %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
10 %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
23 %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
24 ret <4 x i16> %tmp4
49 %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
50 %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
71 %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
72 %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
85 %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
86 ret <4 x i32> %tmp4
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vdup.ll | 10 %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
11 %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
24 %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
25 ret <4 x i16> %tmp4
50 %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
51 %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
72 %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
73 %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
86 %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
87 ret <4 x i32> %tmp4
[all...] |
| vfp.ll | 118 %tmp4 = load float, float* %tmp3 ; <float> [#uses=2]
119 %tmp.upgrd.1 = fcmp oeq float %tmp, %tmp4 ; <i1> [#uses=1]
120 %tmp5 = fcmp uno float %tmp, %tmp4 ; <i1> [#uses=1]
|
| /external/llvm/test/CodeGen/Thumb/ |
| 2011-05-11-DAGLegalizer.ll | 19 %agg.tmp4 = alloca %struct.RRRRRRRR, align 4
36 %tmp8 = bitcast %struct.RRRRRRRR* %agg.tmp4 to i8*
51 call void (i8*, i32, i8*, i8*, ...) @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval %agg.tmp, %struct.RRRRRRRR* byval %agg.tmp4, %struct.RRRRRRRR* byval %agg.tmp10, %struct.RRRRRRRR* byval %agg.tmp16)
|
| 2007-05-05-InvalidPushPop.ll | 26 %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; <i32> [#uses=0]
|
| /external/llvm/test/CodeGen/X86/ |
| stack-align.ll | 16 %tmp4 = tail call double @fabs( double %tmp3 ) readnone ; <double> [#uses=1]
17 store volatile double %tmp4, double* %P
21 %tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1]
|
| 2009-08-06-branchfolder-crash.ll | 51 %tmp4 = load i8, i8* @g_3 ; <i8> [#uses=1]
52 %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1]
101 %tmp4 = load i8, i8* @g_3 ; <i8> [#uses=1]
102 %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| loop_evaluate9.ll | 46 %tmp4 = add i8 %tmp38.i, -4 ; <i8> [#uses=2]
48 %tmp25.i = zext i8 %tmp4 to i16 ; <i16> [#uses=1]
60 %tmp7 = icmp eq i8 %tmp4, -28 ; <i1> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| IntrinsicLowering.cpp | 184 Value *Tmp4 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24),
198 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1");
200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32");
212 Value* Tmp4 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8),
235 Tmp4 = Builder.CreateAnd(Tmp4,
249 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3");
252 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6")
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/ |
| 2011-05-11-DAGLegalizer.ll | 23 %agg.tmp4 = alloca %struct.RRRRRRRR, align 4
40 %tmp8 = bitcast %struct.RRRRRRRR* %agg.tmp4 to i8*
55 call void (i8*, i32, i8*, i8*, ...)* @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval %agg.tmp, %struct.RRRRRRRR* byval %agg.tmp4, %struct.RRRRRRRR* byval %agg.tmp10, %struct.RRRRRRRR* byval %agg.tmp16)
|
| /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/ |
| loop_evaluate9.ll | 41 %tmp4 = add i8 %tmp38.i, -4 ; <i8> [#uses=2]
43 %tmp25.i = zext i8 %tmp4 to i16 ; <i16> [#uses=1]
55 %tmp7 = icmp eq i8 %tmp4, -28 ; <i1> [#uses=1]
|
| /external/webp/src/dsp/ |
| lossless_mips_dsp_r2.c | 31 int tmp1, tmp2, tmp3, tmp4; \
37 "lbu %[tmp4], 3(%[src]) \n\t" \
44 "lw %[tmp4], 12(%[src]) \n\t" \
48 "ext %[tmp4], %[tmp4], 8, 8 \n\t" \
54 "sll %[tmp4], %[tmp4], 2 \n\t" \
58 "lwx %[tmp4], %[tmp4](%[color_map]) \n\t" \
63 "ext %[tmp4], %[tmp4], 8, 8 \n\t"
[all...] |
| /external/llvm/test/Transforms/GVN/ |
| crash.ll | 77 %tmp4 = getelementptr inbounds [4 x %struct.attribute_spec*], [4 x %struct.attribute_spec*]* @attribute_tables, i32 0, i32 undef ; <%struct.attribute_spec**> [#uses=1]
78 %tmp3 = load %struct.attribute_spec*, %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
85 %tmp = load %struct.attribute_spec*, %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
117 %tmp4 = bitcast i8* %tmp40.i to i64*
118 %tmp41.i = load i64, i64* %tmp4
|
| /external/llvm/test/Transforms/InstCombine/ |
| gepphigep.ll | 8 define i32 @test1(%struct1* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
12 br i1 %tmp4, label %bb1, label %bb2
40 define i32 @test2(%struct1* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
62 define i32 @test3(%struct3* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19, i64 %tmp20, i64 %tmp21) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
65 br i1 %tmp4, label %bb1, label %bb2
|
| bswap-fold.ll | 37 %tmp4 = lshr i32 %tmp2, 24
38 ret i32 %tmp4
46 %tmp4 = tail call i32 @llvm.bswap.i32( i32 %tmp2 )
47 ret i32 %tmp4
56 %tmp4 = and i32 %tmp2, 255
57 ret i32 %tmp4
|
| /external/clang/test/CodeGen/ |
| aarch64-poly64.c | 30 // CHECK: [[TMP4:%.*]] = and <1 x i64> [[TMP2]], [[TMP3]]
31 // CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer
43 // CHECK: [[TMP4:%.*]] = and <2 x i64> [[TMP2]], [[TMP3]]
44 // CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer
269 // CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x1x2_t* [[RETVAL]] to i8*
271 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[TMP4]], i8* [[TMP5]], i64 16, i32 8, i1 false)
287 // CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x2x2_t* [[RETVAL]] to i8*
289 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[TMP4]], i8* [[TMP5]], i64 32, i32 16, i1 false)
305 // CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x1x3_t* [[RETVAL]] to i8*
307 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[TMP4]], i8* [[TMP5]], i64 24, i32 8, i1 false
[all...] |
| arm_neon_intrinsics.c | 172 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
173 // CHECK: [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP4]] to <4 x i32>
189 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>
190 // CHECK: [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP4]] to <2 x i64>
215 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
216 // CHECK: [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP4]] to <4 x i32>
232 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <2 x i32>
233 // CHECK: [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP4]] to <2 x i64>
417 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x i16>
418 // CHECK: [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP4]] to <4 x i32
[all...] |
| /external/swiftshader/third_party/LLVM/test/Transforms/ObjCARC/ |
| move-and-form-retain-autorelease.ll | 84 %tmp4 = bitcast %15* %arg to i8*
85 %tmp5 = tail call %18* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %18* (i8*, i8*)*)(i8* %tmp4, i8* %tmp)
142 %tmp49 = tail call %22* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %22* (i8*, i8*)*)(i8* %tmp4, i8* %tmp48)
152 tail call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* %tmp4, i8* %tmp56)
158 %tmp60 = tail call %22* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %22* (i8*, i8*)*)(i8* %tmp4, i8* %tmp59)
178 %tmp76 = tail call %22* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %22* (i8*, i8*)*)(i8* %tmp4, i8* %tmp75)
202 %tmp97 = tail call signext i8 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8 (i8*, i8*)*)(i8* %tmp4, i8* %tmp96)
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| reg_sequence.ll | 85 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 1 ; <<8 x i8>> [#uses=1]
86 %tmp5 = sub <8 x i8> %tmp3, %tmp4
88 %tmp7 = mul <8 x i8> %tmp4, %tmp2
90 ret <8 x i8> %tmp4
104 %tmp4 = bitcast i32* %tmp3 to i8* ; <i8*> [#uses=1]
105 %tmp5 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp4, i32 1) ; <%struct.__neon_int32x4x2_t> [#uses=2]
151 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1 ; <<8 x i16>> [#uses=1]
152 %tmp5 = add <8 x i16> %tmp3, %tmp4 ; <<8 x i16>> [#uses=1]
164 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 ; <<8 x i8>> [#uses=1]
165 %tmp5 = add <8 x i8> %tmp3, %tmp4 ; <<8 x i8>> [#uses=1
[all...] |
| vfp.ll | 118 %tmp4 = load float* %tmp3 ; <float> [#uses=2]
119 %tmp.upgrd.1 = fcmp oeq float %tmp, %tmp4 ; <i1> [#uses=1]
120 %tmp5 = fcmp uno float %tmp, %tmp4 ; <i1> [#uses=1]
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| INTELGFX.ASL | 120 Name(TMP4,Package() {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,0xFFFFFFFF})
121 Store(Or(0x10000,DID1),Index(TMP4,0))
122 Store(Or(0x10000,DID2),Index(TMP4,1))
123 Store(Or(0x10000,DID3),Index(TMP4,2))
125 Store(0x00020F38, Index(TMP4,3))
126 Return(TMP4)
|
| /art/libartbase/base/unix_file/ |
| fd_file_test.cc | 259 art::ScratchFile tmp4; local
260 EXPECT_TRUE(tmp4.GetFile()->WriteFully(&buffer[0], length));
262 EXPECT_NE(reset_compare(tmp, tmp4), 0);
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| string_copy.S | 90 #define tmp4 x10 define
124 orr tmp4, data2, #REP8_7f
125 bic has_nul2, tmp3, tmp4
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| fetch-limits.r600.ll | 16 %tmp4 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
29 %tmp17 = shufflevector <4 x float> %tmp4, <4 x float> %tmp4, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
