/device/linaro/bootloader/arm-trusted-firmware/common/aarch64/ |
debug.S | 39 udiv x0, x4, x5 /* Get the quotient */ 43 udiv x5, x5, x6 /* Reduce divisor */
|
/external/compiler-rt/lib/builtins/arm/ |
udivmodsi4.S | 39 udiv r0, r3, r1 82 # error THUMB mode requires CLZ or UDIV
|
udivsi3.S | 38 udiv r0, r0, r1 82 # error THUMB mode requires CLZ or UDIV
|
umodsi3.S | 35 udiv r2, r0, r1 78 # error THUMB mode requires CLZ or UDIV
|
/external/llvm/test/CodeGen/PowerPC/ |
fast-isel-call.ll | 93 ; Intrinsic calls not yet implemented, and udiv isn't one for PPC anyway. 96 ; %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
|
/external/llvm/test/CodeGen/X86/ |
coalescer-identity.ll | 39 %phitmp.us = udiv i32 %v.010.us, 12 70 %phitmp = udiv i32 %v.010, 12
|
divrem8_ext.ll | 13 %div = udiv i8 %x, %y 112 %d1 = udiv i8 %a, %c
|
handle-move.ll | 22 %x = udiv i32 %b, %a 71 %r1 = udiv i32 %x, %y
|
optimize-max-0.ll | 238 %2 = udiv i32 %1, 4 300 %14 = udiv i32 %w, 2 302 %16 = udiv i32 %x, 2 322 %24 = udiv i32 %w, 2 380 %38 = udiv i32 %37, 4 417 %52 = udiv i32 %51, 2 451 %63 = udiv i32 %62, 2
|
atom-bypass-slow-division.ll | 55 %resultdiv = udiv i32 %a, %b
|
/external/mesa3d/docs/relnotes/ |
11.0.7.html | 123 <li>nir: fix typo in idiv lowering, causing large-udiv-udiv failures</li>
|
/external/swiftshader/third_party/LLVM/unittests/VMCore/ |
ConstantsTest.cpp | 78 // @q = constant i1 udiv(i1 -1, i1 1) 82 // @r = constant i1 udiv(i1 1, i1 -1)
|
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
arch7.d | 47 0+098 <[^>]*> fbb6 f9f3 udiv r9, r6, r3 48 0+09c <[^>]*> fbb9 f6fc udiv r6, r9, ip
|
thumb2_bad_reg.s | 782 @ UDIV (register) 783 udiv r13, r0, r1 784 udiv r15, r0, r1 785 udiv r0, r13, r1 786 udiv r0, r15, r1 787 udiv r0, r1, r13 788 udiv r0, r1, r15
|
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
optimize-max-0.ll | 238 %2 = udiv i32 %1, 4 300 %14 = udiv i32 %w, 2 302 %16 = udiv i32 %x, 2 322 %24 = udiv i32 %w, 2 380 %38 = udiv i32 %37, 4 417 %52 = udiv i32 %51, 2 451 %63 = udiv i32 %62, 2
|
/external/llvm/unittests/Transforms/Utils/ |
IntegerDivision.cpp | 53 TEST(IntegerDivision, UDiv) { 72 EXPECT_TRUE(BB->front().getOpcode() == Instruction::UDiv); 193 EXPECT_TRUE(BB->front().getOpcode() == Instruction::UDiv);
|
/external/swiftshader/third_party/LLVM/test/Transforms/InstSimplify/ |
compare.ll | 288 %A = udiv i32 %X, 1000000 296 %A = udiv exact i32 10, %Z 297 %B = udiv exact i32 20, %Z
|
/external/llvm/bindings/python/llvm/ |
enumerations.py | 75 ('UDiv', 14),
|
/external/llvm/include/llvm/Transforms/Utils/ |
IntegerDivision.h | 27 /// with the generated code. This currently generates code using the udiv
|
/external/llvm/lib/Target/Lanai/ |
LanaiTargetTransformInfo.h | 72 case ISD::UDIV:
|
/external/llvm/test/Analysis/Lint/ |
check-zero-divide.ll | 14 %b = udiv <2 x i32> %a, <i32 5, i32 8>
|
/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
div1.ll | 52 %div = udiv i32 %1, %2
|
/external/llvm/test/CodeGen/Mips/ |
assertzext-trunc.ll | 31 %r = udiv i8 %a, %b
|
divrem.ll | 106 %div = udiv i32 %a0, %a1 216 %div = udiv i32 %a0, %a1 293 %div = udiv i64 %a0, %a1 386 %div = udiv i64 %a0, %a1
|
mips64muldiv.ll | 47 %div = udiv i64 %a0, %a1
|