| /external/llvm/test/tools/llvm-objdump/ARM/ |
| macho-mcpu-arm.test | 7 udiv r1, r2, r3
10 @ CHECK: b2 fb f3 f1 udiv r1, r2, r3
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| udiv-simplify-bug-0.ll | 5 %r = udiv i32 %y, -1
11 %r = udiv i32 %y, 3
|
| 2007-06-21-DivCompareMiscomp.ll | 5 %tmp470 = udiv i32 %tmp468, 4 ; <i32> [#uses=2]
|
| urem.ll | 4 %r = udiv i64 %x1, %y2
|
| 2008-11-20-DivMulRem.ll | 6 %A = udiv i8 %x, %y
26 %A = udiv i8 %x, %y
37 %A = udiv i8 %x, 3
61 %div = udiv i32 %x, %y
62 ; CHECK-NEXT: udiv
64 %r = udiv i32 %mul, %y
|
| udivrem-change-width.ll | 9 %div = udiv i32 %conv, %conv2
13 ; CHECK: udiv i8 %a, %b
29 %div = udiv i32 %conv, %conv2
32 ; CHECK: udiv i8 %a, %b
48 %div = udiv i32 %conv, 10
51 ; CHECK: udiv i8 %a, 10
|
| 2008-07-13-DivZero.ll | 5 ; We can simplify the operand of udiv to '8', but not the operand to the
12 %div = udiv i32 %x, %cond ; <i32> [#uses=1]
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv7-a+idiv.d | 7 0[0-9a-f]+ <[^>]+> e730f211 udiv r0, r1, r2
9 0[0-9a-f]+ <[^>]+> fbb1 f0f2 udiv r0, r1, r2
|
| archv8m.s | 22 udiv r0, r1, r2 label
23 udiv r8, r9, r10 label
|
| /external/llvm/test/Transforms/InstCombine/ |
| compare-udiv.ll | 6 %div = udiv i32 %n, %d
14 %div = udiv i32 64, %d
22 %div = udiv i32 %n, %d
30 %div = udiv i32 64, %d
38 %div = udiv i32 -1, %d
46 %div = udiv i32 5, %d
51 ; (icmp ugt (udiv C1, X), C1) -> false.
55 %div = udiv i32 8, %d
63 %div = udiv i32 4, %d
71 %div = udiv i32 4, %
[all...] |
| 2007-06-21-DivCompareMiscomp.ll | 5 %tmp470 = udiv i32 %tmp468, 4 ; <i32> [#uses=2]
|
| 2008-11-20-DivMulRem.ll | 6 %A = udiv i8 %x, %y
26 %A = udiv i8 %x, %y
37 %A = udiv i8 %x, 3
61 %div = udiv i32 %x, %y
62 ; CHECK-NEXT: udiv
64 %r = udiv i32 %mul, %y
|
| udivrem-change-width.ll | 9 %div = udiv i32 %conv, %conv2
13 ; CHECK: udiv i8 %a, %b
29 %div = udiv i32 %conv, %conv2
32 ; CHECK: udiv i8 %a, %b
48 %div = udiv i32 %conv, 10
51 ; CHECK: udiv i8 %a, 10
|
| 2008-07-13-DivZero.ll | 5 ; We can simplify the operand of udiv to '8', but not the operand to the
12 %div = udiv i32 %x, %cond ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| x86_64-mul-by-const.ll | 7 %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
|
| vec_udiv_to_shift.ll | 6 %0 = udiv <8 x i16> %var, <i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32>
13 %0 = udiv <4 x i32> %var, <i32 16, i32 16, i32 16, i32 16>
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| x86_64-mul-by-const.ll | 7 %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
|
| anyext.ll | 7 %r = udiv i8 %q, %x
14 %r = udiv i16 %q, %x
|
| /external/llvm/test/MC/ARM/ |
| invalid-idiv.s | 11 udiv r3, r4, r5
15 @ ARM-A15: udiv r3, r4, r5
19 @ THUMB-A15: udiv r3, r4, r5
24 @ ARM: udiv r3, r4, r5
28 @ THUMB: udiv r3, r4, r5
|
| idiv.s | 14 udiv r3, r4, r5
16 @ A15-ARM: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
18 @ A15-THUMB: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
21 @ A15-ARM-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
23 @ A15-THUMB-NOARMHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
26 @ ARMV8: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
28 @ THUMBV8: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
31 @ ARMV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
33 @ THUMBV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| div-vec.ll | 59 %res = udiv <4 x i32> %v1, %v2
61 ; ASM: udiv r0, r0, r1
62 ; ASM: udiv r0, r0, r1
63 ; ASM: udiv r0, r0, r1
64 ; ASM: udiv r0, r0, r1
71 ; IASM-NOT: udiv
82 %res = udiv <8 x i16> %v1, %v2
86 ; ASM: udiv r0, r0, r1
89 ; ASM: udiv r0, r0, r1
92 ; ASM: udiv r0, r0, r
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| udiv-invariant-but-traps.ll | 15 %div = udiv i32 1, %x
32 ; CHECK: udiv
|
| /external/llvm/test/Transforms/LICM/ |
| preheader-safe.ll | 10 ; CHECK: %div = udiv i64 %x, %y
17 %div = udiv i64 %x, %y
28 ; CHECK: %div = udiv i64 %x, %y
34 %div = udiv i64 %x, %y
44 ; CHECK: %div = udiv i64 %x, %y
50 %div = udiv i64 %x, %y
63 ; CHECK: %div = udiv i64 %x, %y
70 %div = udiv i64 %x, %y
|
| /external/llvm/test/CodeGen/AArch64/ |
| rem_crash.ll | 5 %0 = udiv i8 %x, 10
21 %0 = udiv i8 %x, 10
37 %0 = udiv i16 %x, 10
53 %0 = udiv i16 %x, 10
69 %0 = udiv i32 %x, 10
85 %0 = udiv i32 %x, 10
101 %0 = udiv i64 %x, 10
117 %0 = udiv i64 %x, 10
133 %0 = udiv i8 %x, 10
149 %0 = udiv i8 %x, 1
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| rem_crash.ll | 5 %0 = udiv i8 %x, 10
21 %0 = udiv i8 %x, 10
37 %0 = udiv i16 %x, 10
53 %0 = udiv i16 %x, 10
69 %0 = udiv i32 %x, 10
85 %0 = udiv i32 %x, 10
101 %0 = udiv i64 %x, 10
117 %0 = udiv i64 %x, 10
133 %0 = udiv i8 %x, 10
149 %0 = udiv i8 %x, 1
[all...] |
