/external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
binops.ll | 403 ; TODO(kschimpf): udiv i8/i16. Needs bitcasts. 407 %div = udiv i32 %a, %b 413 ; CHECK-NEXT: %div = udiv i32 %a, %b 419 %div = udiv i64 %a, %b 425 ; CHECK-NEXT: %div = udiv i64 %a, %b 431 %div = udiv <16 x i8> %a, %b 437 ; CHECK-NEXT: %div = udiv <16 x i8> %a, %b 443 %div = udiv <8 x i16> %a, %b 449 ; CHECK-NEXT: %div = udiv <8 x i16> %a, %b 455 %div = udiv <4 x i32> %a, % [all...] |
/external/llvm/test/MC/Sparc/ |
sparc-alu-instructions.s | 19 ! CHECK: udiv %g1, %g2, %g3 ! encoding: [0x86,0x70,0x40,0x02] 20 udiv %g1, %g2, %g3
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/external/swiftshader/third_party/subzero/crosstest/ |
test_arith_ll.ll | 261 %result = udiv i32 %a, %b 269 %result.trunc = udiv i8 %a.trunc, %b.trunc 277 %result.trunc = udiv i16 %a.trunc, %b.trunc 285 %result = udiv i32 %a, %b 293 %result = udiv i64 %a, %b 301 %result = udiv <4 x i32> %a, %b 309 %result = udiv <8 x i16> %a, %b 317 %result = udiv <16 x i8> %a, %b
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/external/vixl/test/aarch32/config/ |
cond-rd-rn-rm-a32.json | 62 "Udiv", // UDIV{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; A1
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cond-rd-rn-rm-t32.json | 61 "Udiv", // UDIV{<c>}{<q>} {<Rd>}, <Rn>, <Rm> ; T1
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
8bit.pnacl.ll | 131 %udiv = udiv i8 %b_8, %a_8 132 %ret = zext i8 %udiv to i32 148 %udiv = udiv i8 %a_8, 123 149 %ret = zext i8 %udiv to i32
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/ft32/ |
insn.d | 310 4ac: 00 00 f0 f5 f5f00000 udiv.l \$r31,\$r0,\$r0 311 4b0: 00 80 0f f4 f40f8000 udiv.l \$r0,\$r31,\$r0 312 4b4: f0 01 00 f4 f40001f0 udiv.l \$r0,\$r0,\$r31 313 4b8: 40 00 11 f4 f4110040 udiv.l \$r1,\$r2,\$r4 314 4bc: 00 00 88 f4 f4880000 udiv.l \$r8,\$r16,\$r0 315 4c0: 00 60 f0 f5 f5f06000 udiv.l \$r31,\$r0,200 <pmlabel.*> 316 4c4: 00 c0 0f f4 f40fc000 udiv.l \$r0,\$r31,0 <pmlabel.*> 317 4c8: 10 c0 0f f4 f40fc010 udiv.l \$r0,\$r31,1 <pmlabel\+0x1> 318 4cc: f0 df 0f f4 f40fdff0 udiv.l \$r0,\$r31,1ff <pmlabel\+0x1ff> 319 4d0: 10 80 0f f2 f20f8010 udiv.s \$r0,\$r31,\$r [all...] |
/external/llvm/include/llvm/IR/ |
Operator.h | 124 /// A udiv or sdiv instruction, which can be marked as "exact", 147 OpC == Instruction::UDiv || 351 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/external/llvm/test/CodeGen/AMDGPU/ |
udivrem.ll | 55 %result0 = udiv i32 %x, %y 162 %result0 = udiv <2 x i32> %x, %y 344 %result0 = udiv <4 x i32> %x, %y
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/external/llvm/test/CodeGen/NVPTX/ |
arithmetic-int.ll | 66 %ret = udiv i64 %a, %b 163 %ret = udiv i32 %a, %b 256 %ret = udiv i16 %a, %b
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/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
Operator.h | 124 /// A udiv or sdiv instruction, which can be marked as "exact", 148 OpC == Instruction::UDiv || 375 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
Operator.h | 124 /// A udiv or sdiv instruction, which can be marked as "exact", 148 OpC == Instruction::UDiv || 375 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/IR/ |
Operator.h | 118 /// A udiv or sdiv instruction, which can be marked as "exact", 142 OpC == Instruction::UDiv || 376 : public ConcreteOperator<PossiblyExactOperator, Instruction::UDiv> {
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/frameworks/compile/mclinker/lib/Target/ARM/ |
ARMELFAttributeData.cpp | 306 // 2 means the code was permitted to use SDIV/UDIV in anyway. 659 // 0: The code was permitted to use SDIV and UDIV in the Thumb ISA on v7-R or 661 // 1: The code was not permitted to use SDIV and UDIV. 662 // 2: The code was explicitly permitted to use SDIV and UDIV. [all...] |