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  /external/freetype/src/pfr/
pfrerror.h 30 #undef FTERRORS_H_
32 #undef FT_ERR_PREFIX
  /external/freetype/src/psaux/
psauxerr.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/freetype/src/pshinter/
pshnterr.h 30 #undef FTERRORS_H_
32 #undef FT_ERR_PREFIX
  /external/freetype/src/psnames/
psnamerr.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/freetype/src/raster/
rasterrs.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/freetype/src/sfnt/
sferrors.h 30 #undef FTERRORS_H_
32 #undef FT_ERR_PREFIX
  /external/freetype/src/smooth/
ftsmerrs.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/freetype/src/truetype/
tterrors.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/freetype/src/type1/
t1errors.h 30 #undef FTERRORS_H_
32 #undef FT_ERR_PREFIX
  /external/freetype/src/type42/
t42error.h 30 #undef FTERRORS_H_
32 #undef FT_ERR_PREFIX
  /external/freetype/src/winfonts/
fnterrs.h 31 #undef FTERRORS_H_
33 #undef FT_ERR_PREFIX
  /external/libevent/
make-event-config.sed 22 s/#\( *\)undef /#\1undef EVENT__/
  /external/llvm/test/Analysis/CostModel/PowerPC/
cmp-expanded.ll 10 %v1 = fcmp ugt <4 x double> undef, undef
  /external/llvm/test/Analysis/ScalarEvolution/
2009-07-04-GroupConstantsWidthMismatch.ll 6 %0 = load i16, i16* undef, align 1
10 %4 = load i8, i8* undef, align 1
  /external/llvm/test/CodeGen/ARM/
undef-sext.ll 3 ; No need to sign-extend undef.
10 %0 = sext i16 undef to i32
  /external/llvm/test/CodeGen/Hexagon/
block-ranges-nodef.ll 13 store i64 %or, i64* undef, align 8
14 br i1 undef, label %if.then44, label %if.end96
17 br i1 undef, label %overflow, label %lor.lhs.false
20 br i1 undef, label %overflow, label %if.end52
23 br i1 undef, label %if.then55, label %if.end96
28 %cmp63 = icmp ule i64 %or, undef
31 %or.cond299 = and i1 %.cmp63, undef
41 br i1 undef, label %if.end102, label %if.then98
circ-load-isel.ll 12 %0 = tail call i8* @llvm.hexagon.circ.ldw(i8* undef, i8* undef, i32 150995968, i32 4)
vselect-pseudo.ll 12 %cmp10.us = icmp eq i32 0, undef
13 %.h63h32.2.us = select i1 %cmp10.us, <16 x i32> zeroinitializer, <16 x i32> undef
14 %0 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %.h63h32.2.us, <16 x i32> undef, i32 2)
15 %1 = tail call <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1> undef, <16 x i32> undef, <16 x i32> %0)
17 %3 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %2, i32 62)
19 store <16 x i32> %4, <16 x i32>* undef, align 64
20 br i1 undef, label %for.body9.us, label %for.body43.us.preheader
  /external/llvm/test/CodeGen/MIR/X86/
implicit-register-flag.mir 56 ; CHECK: dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
57 dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
65 ; CHECK: dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w
66 dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w
  /external/llvm/test/CodeGen/PowerPC/
ashr-neg1.ll 10 br i1 undef, label %CF80, label %CF84
13 %Cmp62 = icmp sge i32 undef, %B
misched.ll 14 br i1 undef, label %for.body, label %for.body24.i
17 store double 1.000000e+00, double* undef, align 8
18 br i1 undef, label %for.body24.i58, label %for.body24.i
21 %arrayidx26.i55.1 = getelementptr inbounds [16000 x double], [16000 x double]* @b, i64 0, i64 undef
23 br i1 undef, label %for.body24.i64, label %for.body24.i58
30 br i1 undef, label %for.body24.i76, label %for.body24.i70
33 br i1 undef, label %set1d.exit77, label %for.body24.i76
39 br i1 undef, label %for.end35, label %for.body29
  /external/llvm/test/CodeGen/SystemZ/
vec-perm-02.ll 11 %val = insertelement <16 x i8> undef, i8 %scalar, i32 0
12 %ret = shufflevector <16 x i8> %val, <16 x i8> undef,
23 %val = insertelement <16 x i8> undef, i8 %scalar, i32 15
24 %ret = shufflevector <16 x i8> %val, <16 x i8> undef,
39 %val = insertelement <16 x i8> undef, i8 %scalar, i32 4
40 %ret = shufflevector <16 x i8> undef, <16 x i8> %val,
54 %val = insertelement <8 x i16> undef, i16 %scalar, i32 0
55 %ret = shufflevector <8 x i16> %val, <8 x i16> undef,
66 %val = insertelement <8 x i16> undef, i16 %scalar, i32 7
67 %ret = shufflevector <8 x i16> %val, <8 x i16> undef,
    [all...]
  /external/llvm/test/CodeGen/X86/
2010-02-23-DAGCombineBug.ll 8 %cmp = icmp slt i32 undef, 0 ; <i1> [#uses=1]
13 ret i32* undef
2012-07-15-tconst_shl.ll 6 %Shuff7 = shufflevector <16 x i32> zeroinitializer, <16 x i32> zeroinitializer, <16 x i32> <i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 undef, i32 22, i32 24, i32 26, i32 28, i32 30, i32 undef>
large-code-model-isel.ll 11 %call = call i64* undef(i64* undef, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str10, i32 0, i32 0))

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