/external/llvm/test/CodeGen/X86/ |
pr10524.ll | 7 %Shuff22 = shufflevector <2 x i32> undef, <2 x i32> zeroinitializer, <2 x i32> <i32 3, i32 1> 12 store <2 x i8> %Se335, <2 x i8>* undef
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pshufd-combine-crash.ll | 10 %1 = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1> 11 %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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vshift-5.ll | 11 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 12 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 25 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 26 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 38 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 39 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 51 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 52 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
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zext-extract_subreg.ll | 6 br i1 undef, label %return, label %if.end.i 9 %tmp7.i = load i32, i32* undef, align 4 10 br i1 undef, label %return, label %if.end 18 %tmp138 = select i1 undef, i32 0, i32 %tmp7.i 29 br i1 undef, label %while.body, label %while.end 35 br i1 undef, label %cond.false205, label %cond.true190 38 br i1 undef, label %cond.false242, label %cond.true225 44 br i1 undef, label %cond.false280, label %cond.true271
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/external/llvm/test/Transforms/Inline/ |
pr28298.ll | 13 call void undef() 18 ; CHECK: call void undef(
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/external/llvm/test/Transforms/LCSSA/ |
unreachable-use.ll | 14 br i1 undef, label %bb7, label %bb45 17 %tmp = bitcast i1** undef to i1**
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/external/llvm/test/Transforms/LoopStrengthReduce/ |
pr12048.ll | 11 %tmp.1 = phi i8* [ undef, %while.cond40.preheader ], [ %incdec.ptr, %while.body51 ] 12 switch i8 undef, label %while.body51 [ 20 br i1 undef, label %if.then64, label %if.end113 22 %incdec.ptr88.tmp.2 = select i1 undef, i8* undef, i8* undef 25 %tmp.4 = phi i8* [ %incdec.ptr88.tmp.2, %if.then64 ], [ undef, %if.then59 ] 37 br i1 undef, label %while.cond132.while.cond.loopexit_crit_edge, label %while.body139
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/external/llvm/test/Transforms/SCCP/ |
apint-select.ll | 8 %BB = and i64 %B, undef 17 %X = select i1 %C, i712 0, i712 undef
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/external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
minimum-sizes.ll | 15 br i1 undef, label %for.end11, label %for.cond4 18 %k.13 = phi i32 [ undef, %entry ], [ %k.3, %for.cond4 ] 20 %e.1 = select i1 undef, i32 %e.02, i32 0 21 %k.3 = select i1 undef, i32 %k.13, i32 undef 37 br i1 undef, label %for.ph, label %for.end 45 %sub = sub i32 %0, undef 50 %bf.set17 = or i72 %bf.clear16, undef
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/external/ltp/testcases/kernel/syscalls/ptrace/ |
ptrace.h | 26 #undef FU_ia64_fpreg 27 #undef FU_pt_all_user_regs
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/external/python/cpython3/Objects/stringlib/ |
find_max_char.h | 46 #undef ASCII_CHAR_MASK 125 #undef MASK_ASCII 126 #undef MASK_UCS1 127 #undef MASK_UCS2 128 #undef MAX_CHAR_ASCII 129 #undef MAX_CHAR_UCS1 130 #undef MAX_CHAR_UCS2 131 #undef MAX_CHAR_UCS4
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/external/swiftshader/third_party/LLVM/test/Analysis/ScalarEvolution/ |
2009-07-04-GroupConstantsWidthMismatch.ll | 6 %0 = load i16* undef, align 1 10 %4 = load i8* undef, align 1
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
undef-sext.ll | 3 ; No need to sign-extend undef. 10 %0 = sext i16 undef to i32
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
2007-05-17-ShuffleISelBug.ll | 9 %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 >
15 %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, <8 x i16> < i16 8, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef > )
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2010-02-23-DAGCombineBug.ll | 8 %cmp = icmp slt i32 undef, 0 ; <i1> [#uses=1] 13 ret i32* undef
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vec-trunc-store.ll | 6 store <8 x i16> %cti69, <8 x i16>* undef 13 store <4 x i16> %cti44, <4 x i16>* undef
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vshift-5.ll | 11 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 12 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 25 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 26 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 38 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 39 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 51 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 52 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
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zext-extract_subreg.ll | 6 br i1 undef, label %return, label %if.end.i 9 %tmp7.i = load i32* undef, align 4, !tbaa !0 10 br i1 undef, label %return, label %if.end 18 %tmp138 = select i1 undef, i32 0, i32 %tmp7.i 29 br i1 undef, label %while.body, label %while.end 35 br i1 undef, label %cond.false205, label %cond.true190 38 br i1 undef, label %cond.false242, label %cond.true225 44 br i1 undef, label %cond.false280, label %cond.true271
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/external/swiftshader/third_party/LLVM/test/Transforms/LCSSA/ |
unreachable-use.ll | 12 br i1 undef, label %bb7, label %bb45 15 %tmp = bitcast i1** undef to i1**
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/external/swiftshader/third_party/LLVM/test/Transforms/SCCP/ |
apint-select.ll | 8 %BB = and i64 %B, undef
17 %X = select i1 %C, i712 0, i712 undef
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/external/tensorflow/tensorflow/compiler/xla/service/ |
hlo_opcode.cc | 29 #undef CASE_OPCODE_STRING 38 #undef STRING_TO_OPCODE_ENTRY 60 #undef CASE_IS_COMPARISON 70 #undef CASE_IS_VARIADIC 74 #undef HAS_PROPERTY 75 #undef RESOLVE 76 #undef CHECK_DEFAULT 77 #undef CHECK_PROPERTY
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/hardware/invensense/6515/libsensors_iio/software/core/driver/include/ |
mlinclude.h | 24 #undef INVENSENSE_FUNC_START 31 #undef INVENSENSE_FUNC_START
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/hardware/invensense/65xx/libsensors_iio/software/core/driver/include/ |
mlinclude.h | 24 #undef INVENSENSE_FUNC_START 31 #undef INVENSENSE_FUNC_START
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/packages/apps/TV/jni/minijail/ |
minijail.h | 10 #undef com_android_tv_tuner_exoplayer_ffmpeg_FfmpegDecoderService_DEBUG 12 #undef com_android_tv_tuner_exoplayer_ffmpeg_FfmpegDecoderService_MINIJAIL_SETUP_WAIT_TIMEOUT_MS
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/alpha/ |
elf-reloc-6.s | 1 br $31, undef 2 br $31, undef !samegp
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