| /external/llvm/test/CodeGen/ARM/ |
| 2009-11-02-NegativeLane.ll | 7 br i1 undef, label %return, label %bb
11 %0 = load i16, i16* undef, align 2
12 %1 = insertelement <8 x i16> undef, i16 %0, i32 2
13 %2 = insertelement <8 x i16> %1, i16 undef, i32 3
16 store i16 %4, i16* undef, align 2
17 br i1 undef, label %return, label %bb
|
| 2012-04-02-TwoAddrInstrCrash.ll | 7 br i1 undef, label %5, label %1
10 %2 = shufflevector <1 x i64> zeroinitializer, <1 x i64> undef, <2 x i32> <i32 0, i32 1>
12 store <4 x float> zeroinitializer, <4 x float>* undef, align 16
13 store <4 x float> zeroinitializer, <4 x float>* undef, align 16
14 store <4 x float> %3, <4 x float>* undef, align 16
16 store <4 x float> %4, <4 x float>* undef, align 16
|
| data-in-code-annotations.ll | 19 switch i32 undef, label %return [
36 %div = sdiv i32 undef, undef
40 %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ]
|
| jumptable-label.ll | 10 switch i32 undef, label %return [
27 %div = sdiv i32 undef, undef
31 %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ]
|
| 2009-06-30-RegScavengerAssert.ll | 17 br i1 undef, label %bb5, label %bb
23 br i1 undef, label %bb6, label %bb8
26 br i1 undef, label %bb8, label %bb6
32 br i1 undef, label %bb10, label %bb11
38 %0 = load i32, i32* undef, align 4 ; <i32> [#uses=2]
40 store i32 %1, i32* undef, align 4
41 %2 = load i32, i32* undef, align 4 ; <i32> [#uses=1]
47 tail call void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwin
[all...] |
| /external/llvm/test/CodeGen/Hexagon/ |
| swp-epilog-reuse.ll | 11 br i1 undef, label %for.body, label %for.end
15 %dstEnd.01519 = phi float* [ %add.ptr725, %while.end712 ], [ undef, %entry.split ]
16 %add.ptr367 = getelementptr inbounds float, float* %srcImg, i32 undef
18 br i1 undef, label %while.body661.preheader, label %while.end712
25 %lsr.iv1942 = phi float* [ %scevgep1941, %while.body661.preheader ], [ undef, %while.body661.ur ]
26 %col1.31508.reg2mem.0.ur = phi float [ %col3.31506.reg2mem.0.ur, %while.body661.ur ], [ undef, %while.body661.preheader ]
28 %col3.31506.reg2mem.0.ur = phi float [ %add689.ur, %while.body661.ur ], [ undef, %while.body661.preheader ]
31 %add663.ur = fadd float undef, %mul662.ur
32 %add665.ur = fadd float %add663.ur, undef
33 %add667.ur = fadd float undef, %add665.u
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| bv-pres-v8i1.ll | 9 br i1 undef, label %CF78, label %CF87
13 %Cmp26 = icmp slt i32 -1, undef
17 br i1 undef, label %CF79, label %CF82
20 br i1 undef, label %CF82, label %CF84
26 br i1 undef, label %CF, label %CF85
30 %Cmp61 = icmp ult i32 477567, undef
|
| /external/llvm/test/CodeGen/X86/ |
| 2010-01-07-ISelBug.ll | 9 br i1 undef, label %for.body161, label %for.end197
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
16 store i96 %mlucEntry.4, i96* undef, align 8
20 store i32 %tmp1.i1.i, i32* undef, align 8
24 ret i32 undef
|
| 2011-01-07-LegalizeTypesCrash.ll | 7 %i17 = icmp eq <4 x i8> undef, zeroinitializer
9 %_comp = select i1 %cond, i8 0, i8 undef
10 %merge = insertelement <4 x i8> undef, i8 %_comp, i32 0
12 %_comp4 = select i1 %cond3, i8 0, i8 undef
15 %_comp9 = select i1 %cond8, i8 0, i8 undef
17 store <4 x i8> %m387, <4 x i8>* undef
|
| 2011-12-06-AVXVectorExtractCombine.ll | 12 %c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
13 %d = shufflevector <8 x i32> %c, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
| dagcombine-buildvector.ll | 11 %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 >
21 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
| 2009-07-15-CoalescerBug.ll | 40 br i1 undef, label %bb21, label %bb
46 switch i32 undef, label %bb103 [
61 br i1 undef, label %bb69, label %bb70
64 ret i32 undef
76 switch i32 undef, label %bb104 [
168 ret i32 undef
195 br i1 undef, label %bb1498, label %bb1496
198 br i1 undef, label %bb1498, label %bb1510.preheader
204 br i1 undef, label %bb1511, label %bb1518
210 switch i32 undef, label %bb741.i4285
[all...] |
| /external/llvm/test/Transforms/IPConstantProp/ |
| PR26044.ll | 10 br i1 undef, label %if.end, label %if.end
13 %e.2 = phi i32* [ undef, %entry ], [ null, %for.cond1 ], [ null, %for.cond1 ]
27 ; CHECK: call i32 @fn1(i32 undef)
30 ; CHECK:%[[COND:.*]] = select i1 undef, i32 undef, i32 undef
|
| /external/python/cpython2/Modules/ |
| addrinfo.h | 40 #undef EAI_ADDRFAMILY
41 #undef EAI_AGAIN
42 #undef EAI_BADFLAGS
43 #undef EAI_FAIL
44 #undef EAI_FAMILY
45 #undef EAI_MEMORY
46 #undef EAI_NODATA
47 #undef EAI_NONAME
48 #undef EAI_SERVICE
49 #undef EAI_SOCKTYP
[all...] |
| /external/python/cpython3/Modules/ |
| addrinfo.h | 40 #undef EAI_ADDRFAMILY
41 #undef EAI_AGAIN
42 #undef EAI_BADFLAGS
43 #undef EAI_FAIL
44 #undef EAI_FAMILY
45 #undef EAI_MEMORY
46 #undef EAI_NODATA
47 #undef EAI_NONAME
48 #undef EAI_SERVICE
49 #undef EAI_SOCKTYP
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| 2009-11-02-NegativeLane.ll | 7 br i1 undef, label %return, label %bb
11 %0 = load i16* undef, align 2
12 %1 = insertelement <8 x i16> undef, i16 %0, i32 2
13 %2 = insertelement <8 x i16> %1, i16 undef, i32 3
16 store i16 %4, i16* undef, align 2
17 br i1 undef, label %return, label %bb
|
| jumptable-label.ll | 10 switch i32 undef, label %return [
27 %div = sdiv i32 undef, undef
31 %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| 2010-01-07-ISelBug.ll | 9 br i1 undef, label %for.body161, label %for.end197
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
16 store i96 %mlucEntry.4, i96* undef, align 8
20 store i32 %tmp1.i1.i, i32* undef, align 8
24 ret i32 undef
|
| 2011-01-07-LegalizeTypesCrash.ll | 7 %i17 = icmp eq <4 x i8> undef, zeroinitializer
9 %_comp = select i1 %cond, i8 0, i8 undef
10 %merge = insertelement <4 x i8> undef, i8 %_comp, i32 0
12 %_comp4 = select i1 %cond3, i8 0, i8 undef
15 %_comp9 = select i1 %cond8, i8 0, i8 undef
17 store <4 x i8> %m387, <4 x i8>* undef
|
| dagcombine-buildvector.ll | 11 %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 >
21 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
| vec_shift2.ll | 5 %tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
12 %tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
|
| 2009-07-15-CoalescerBug.ll | 40 br i1 undef, label %bb21, label %bb
46 switch i32 undef, label %bb103 [
61 br i1 undef, label %bb69, label %bb70
64 ret i32 undef
76 switch i32 undef, label %bb104 [
168 ret i32 undef
195 br i1 undef, label %bb1498, label %bb1496
198 br i1 undef, label %bb1498, label %bb1510.preheader
204 br i1 undef, label %bb1511, label %bb1518
210 switch i32 undef, label %bb741.i4285
[all...] |
| /external/v8/src/parsing/ |
| token.cc | 16 #undef T
23 #undef T
34 #undef T
40 #undef T
48 #undef KT
49 #undef KK
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/config/ |
| initfini-array.h | 25 #undef INIT_SECTION_ASM_OP
26 #undef FINI_SECTION_ASM_OP
28 #undef INIT_ARRAY_SECTION_ASM_OP
31 #undef FINI_ARRAY_SECTION_ASM_OP
35 #undef TARGET_ASM_CONSTRUCTOR
37 #undef TARGET_ASM_DESTRUCTOR
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| e-mipself.c | 40 #undef emul_name
41 #undef emul_struct_name
42 #undef emul_default_endian
49 #undef emul_name
50 #undef emul_struct_name
51 #undef emul_default_endian
|
