| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/IR/ |
| IntrinsicsNVVM.td | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86GenCallingConv.inc | 223 LocVT == MVT::v2i64 ||
258 LocVT == MVT::v2i64 ||
527 LocVT = MVT::v2i64;
543 LocVT == MVT::v2i64 ||
594 LocVT == MVT::v2i64 ||
648 LocVT == MVT::v2i64 ||
691 LocVT == MVT::v2i64 ||
751 LocVT == MVT::v2i64 ||
850 LocVT == MVT::v2i64 ||
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| intrapred_msa.c | 222 val0 = __msa_copy_u_d((v2i64)store, 0);
239 data = (v16u8)__msa_insert_d((v2i64)data, 0, val0);
245 val0 = __msa_copy_u_d((v2i64)store, 0);
256 out = __msa_copy_u_d((v2i64)store, 0);
423 src_top = (v16i8)__msa_insert_d((v2i64)src_top, 0, val);
|
| /external/llvm/lib/Target/ARM/ |
| ARMRegisterInfo.td | 313 def QPR : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64, v8f16], 128,
321 def QPR_VFP2 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
325 def QPR_8 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
338 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
411 def DPairSpc : RegisterClass<"ARM", [v2i64], 64, (add Tuples2DSpc)>;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.td | 249 [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 128,
254 [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 128,
272 def v128g : TypedReg<v2i64, VR128>;
|
| /external/llvm/test/CodeGen/ARM/ |
| vbsl.ll | 182 %vbsl3.i = tail call <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind
189 %vbsl3.i = tail call <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind
201 declare <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone
|
| vcnt.ll | 81 %tmp2 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %tmp1, i1 0)
143 %tmp2 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %tmp1, i1 1)
155 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone
|
| vshiftins.ll | 71 %tmp3 = call <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2, <2 x i64> < i64 63, i64 63 >)
143 %tmp3 = call <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2, <2 x i64> < i64 -64, i64 -64 >)
155 declare <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMRegisterInfo.td | 297 def QPR : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 128,
306 def QPR_VFP2 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
313 def QPR_8 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| vmul.ll | 206 %tmp3 = call <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
266 %tmp3 = call <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
315 %1 = tail call <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32> %arg0_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
355 %1 = tail call <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32> %arg0_uint32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
361 declare <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
365 declare <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
|
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| MachineValueType.h | 97 v2i64 = 48, // 2 x i64
350 SimpleTy == MVT::v4i32 || SimpleTy == MVT::v2i64 ||
474 case v2i64:
584 case v2i64:
696 case v2i64:
867 if (NumElements == 2) return MVT::v2i64;
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/ |
| MachineValueType.h | 97 v2i64 = 48, // 2 x i64
350 SimpleTy == MVT::v4i32 || SimpleTy == MVT::v2i64 ||
474 case v2i64:
584 case v2i64:
696 case v2i64:
867 if (NumElements == 2) return MVT::v2i64;
[all...] |
