| /external/llvm/lib/Target/ARM/ |
| ARMRegisterInfo.td | 291 def DPR : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32, v4f16], 64,
304 def DPR_VFP2 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32, v4f16], 64,
309 def DPR_8 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32, v4f16], 64,
|
| /external/llvm/test/CodeGen/ARM/ |
| cttz_vector.ll | 8 declare <8 x i8> @llvm.cttz.v8i8(<8 x i8>, i1)
59 %tmp = call <8 x i8> @llvm.cttz.v8i8(<8 x i8> %a, i1 false)
243 %tmp = call <8 x i8> @llvm.cttz.v8i8(<8 x i8> %a, i1 true)
|
| vmul.ll | 44 %tmp3 = call <8 x i8> @llvm.arm.neon.vmulp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
93 declare <8 x i8> @llvm.arm.neon.vmulp.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
598 %vqmovn1.i180 = tail call <8 x i8> @llvm.arm.neon.vqmovnu.v8i8(<8 x i16> %vrshr_n170) nounwind
612 declare <8 x i8> @llvm.arm.neon.vqmovnu.v8i8(<8 x i16>) nounwind readnone
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| IntrinsicsARM.td | 199 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
200 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
201 // Overall, the classes range from 2 to 6 v8i8 arguments.
|
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| IntrinsicsARM.td | 199 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
200 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
201 // Overall, the classes range from 2 to 6 v8i8 arguments.
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/IR/ |
| IntrinsicsARM.td | 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
385 // Overall, the classes range from 2 to 6 v8i8 arguments.
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-neon-3vdiff.ll | 33 declare <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8>, <8 x i8>)
39 declare <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8>, <8 x i8>)
45 declare <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16>, <8 x i16>)
51 declare <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16>, <8 x i16>)
693 %vraddhn2.i = tail call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> %a, <8 x i16> %b)
717 %vraddhn2.i = tail call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> %a, <8 x i16> %b)
741 %vraddhn2.i.i = tail call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> %a, <8 x i16> %b)
777 %vraddhn2.i.i = tail call <8 x i8> @llvm.aarch64.neon.raddhn.v8i8(<8 x i16> %a, <8 x i16> %b)
[all...] |
| /external/clang/test/CodeGen/ |
| arm_neon_intrinsics.c | 10 // CHECK: [[VABD_V_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %b, <8 x i8> %c) #4
46 // CHECK: [[VABD_V_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %b, <8 x i8> %c) #4
155 // CHECK: [[VABD_V_I_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %b, <8 x i8> %c) #4
198 // CHECK: [[VABD_V_I_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %b, <8 x i8> %c) #4
242 // CHECK: [[VABD_V_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %a, <8 x i8> %b) #4
275 // CHECK: [[VABD_V_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %a, <8 x i8> %b) #4
401 // CHECK: [[VABD_V_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %a, <8 x i8> %b) #4
441 // CHECK: [[VABD_V_I_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %a, <8 x i8> %b) #4
482 // CHECK: [[VABS_I:%.*]] = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %a) #4
[all...] |
| systemz-abi-vector.c | 20 typedef __attribute__((vector_size(8))) char v8i8; typedef
54 v8i8 pass_v8i8(v8i8 arg) { return arg; }
148 struct agg_v8i8 { v8i8 a; };
285 v8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| vec-shift-07.ll | 27 ; Test a v8i8->v8i16 extension.
|
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| ValueTypes.td | 49 def v8i8 : ValueType<64 , 26>; // 8 x i8 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/ |
| ValueTypes.td | 49 def v8i8 : ValueType<64 , 26>; // 8 x i8 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/ |
| ValueTypes.td | 49 def v8i8 : ValueType<64 , 26>; // 8 x i8 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/ |
| ValueTypes.td | 49 def v8i8 : ValueType<64 , 26>; // 8 x i8 vector value
|
