| /external/vixl/examples/aarch64/ |
| add4-double.cc | 1 // Copyright 2014, VIXL authors
|
| debugger.cc | 1 // Copyright 2014, VIXL authors
|
| factorial-rec.cc | 1 // Copyright 2014, VIXL authors
|
| factorial.cc | 1 // Copyright 2014, VIXL authors
|
| /external/vixl/test/aarch32/config/ |
| cond-rd-operand-const-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rd-operand-imm16-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rdlow-operand-imm8-t32.json | 1 // Copyright 2016, VIXL authors
|
| /external/vixl/test/aarch64/traces/ |
| sim-addv-b-16b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-addv-b-8b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-addv-h-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-addv-h-8h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-saddlv-h-16b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-saddlv-h-8b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-saddlv-s-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-saddlv-s-8h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-smaxv-b-16b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-smaxv-b-8b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-smaxv-h-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-smaxv-h-8h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sminv-b-16b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sminv-b-8b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sminv-h-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sminv-h-8h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sqabs-b-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-sqabs-h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
