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  /external/vixl/test/aarch32/traces/
simulator-cond-rd-rn-operand-rm-uxtab16-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
378 { 0x10000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
411 { 0xc0000000, 0x56545654, 0x56545654, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0x00fe00fd, 0x00fe00fd, 0x7fffffff },
431 { 0xe0000000, 0x00ff80fe, 0x00ff80fe, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
521 { 0xa0000000, 0x00fe007f, 0x00fe007f, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-uxtah-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
378 { 0x10000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
411 { 0xc0000000, 0x55565554, 0x55565554, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0x0000fffd, 0x0000fffd, 0x7fffffff },
431 { 0xe0000000, 0x00017ffe, 0x00017ffe, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
521 { 0xa0000000, 0x0000ff7f, 0x0000ff7f, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-lsr-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
332 { 0x40000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
396 { 0x80000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
411 { 0xc0000000, 0x00000000, 0x00000000, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0x00000000, 0x00000000, 0x7fffffff },
431 { 0xe0000000, 0x00000000, 0x00000000, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 }
    [all...]
simulator-cond-rd-rn-operand-rm-lsrs-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
332 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
396 { 0x20000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
411 { 0x40000000, 0x00000000, 0x00000000, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0x40000000, 0x00000000, 0x00000000, 0x7fffffff },
431 { 0x40000000, 0x00000000, 0x00000000, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 }
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to31-orr-a32.h 294 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
296 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
318 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
371 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x80000000 },
372 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to31-orr-t32.h 294 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
296 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
318 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
371 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x80000000 },
372 { 0x00000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to31-orrs-a32.h 294 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
296 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
318 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
371 { 0x20000000, 0x7fffffff, 0x7fffffff, 0x80000000 },
372 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to31-orrs-t32.h 294 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
296 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
318 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
371 { 0x20000000, 0x7fffffff, 0x7fffffff, 0x80000000 },
372 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-and-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
411 { 0xc0000000, 0x55555555, 0x55555555, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0x7ffffffe, 0x7ffffffe, 0x7fffffff },
431 { 0xe0000000, 0x00007fff, 0x00007fff, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
521 { 0xa0000000, 0x7fffff80, 0x7fffff80, 0x7fffffff },
613 { 0xc0000000, 0x55555555, 0x55555555, 0x7fffffff },
619 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-ands-t32.h 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
411 { 0x00000000, 0x55555555, 0x55555555, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0x00000000, 0x7ffffffe, 0x7ffffffe, 0x7fffffff },
431 { 0x20000000, 0x00007fff, 0x00007fff, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
521 { 0x20000000, 0x7fffff80, 0x7fffff80, 0x7fffffff },
613 { 0x00000000, 0x55555555, 0x55555555, 0x7fffffff },
619 { 0x20000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-rsc-a32.h 294 { 0x00000000, 0x3fffff80, 0x3fffff80, 0x7fffffff },
318 { 0x00000000, 0x3fff8000, 0x3fff8000, 0x7fffffff },
334 { 0x00000000, 0x40007ffc, 0x40007ffc, 0x7fffffff },
372 { 0x00000000, 0x4000007c, 0x4000007c, 0x7fffffff },
375 { 0x00000000, 0x3ffffffd, 0x3ffffffd, 0x7fffffff },
378 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x00000000, 0x3fff8001, 0x3fff8001, 0x7fffffff },
419 { 0x00000000, 0x0ccccccb, 0x0ccccccb, 0x7fffffff },
477 { 0x00000000, 0x3fffffde, 0x3fffffde, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-rscs-a32.h 294 { 0x20000000, 0x3fffff80, 0x3fffff80, 0x7fffffff },
318 { 0x20000000, 0x3fff8000, 0x3fff8000, 0x7fffffff },
334 { 0x00000000, 0x40007ffc, 0x40007ffc, 0x7fffffff },
372 { 0x00000000, 0x4000007c, 0x4000007c, 0x7fffffff },
375 { 0x20000000, 0x3ffffffd, 0x3ffffffd, 0x7fffffff },
378 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x20000000, 0x3fff8001, 0x3fff8001, 0x7fffffff },
419 { 0x20000000, 0x0ccccccb, 0x0ccccccb, 0x7fffffff },
477 { 0x20000000, 0x3fffffde, 0x3fffffde, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbc-a32.h 294 { 0x00000000, 0xc000007e, 0xc000007e, 0x7fffffff },
318 { 0x00000000, 0xc0007ffe, 0xc0007ffe, 0x7fffffff },
334 { 0x00000000, 0xbfff8002, 0xbfff8002, 0x7fffffff },
372 { 0x00000000, 0xbfffff82, 0xbfffff82, 0x7fffffff },
375 { 0x00000000, 0xc0000001, 0xc0000001, 0x7fffffff },
378 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x00000000, 0xc0007ffd, 0xc0007ffd, 0x7fffffff },
419 { 0x00000000, 0xf3333333, 0xf3333333, 0x7fffffff },
477 { 0x00000000, 0xc0000020, 0xc0000020, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbc-t32.h 294 { 0x00000000, 0xc000007e, 0xc000007e, 0x7fffffff },
318 { 0x00000000, 0xc0007ffe, 0xc0007ffe, 0x7fffffff },
334 { 0x00000000, 0xbfff8002, 0xbfff8002, 0x7fffffff },
372 { 0x00000000, 0xbfffff82, 0xbfffff82, 0x7fffffff },
375 { 0x00000000, 0xc0000001, 0xc0000001, 0x7fffffff },
378 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x00000000, 0xc0007ffd, 0xc0007ffd, 0x7fffffff },
419 { 0x00000000, 0xf3333333, 0xf3333333, 0x7fffffff },
477 { 0x00000000, 0xc0000020, 0xc0000020, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbcs-a32.h 294 { 0x80000000, 0xc000007e, 0xc000007e, 0x7fffffff },
318 { 0x80000000, 0xc0007ffe, 0xc0007ffe, 0x7fffffff },
334 { 0xa0000000, 0xbfff8002, 0xbfff8002, 0x7fffffff },
372 { 0xa0000000, 0xbfffff82, 0xbfffff82, 0x7fffffff },
375 { 0x80000000, 0xc0000001, 0xc0000001, 0x7fffffff },
378 { 0x30000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x80000000, 0xc0007ffd, 0xc0007ffd, 0x7fffffff },
419 { 0x80000000, 0xf3333333, 0xf3333333, 0x7fffffff },
477 { 0x80000000, 0xc0000020, 0xc0000020, 0x7fffffff },
    [all...]
simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbcs-t32.h 294 { 0x80000000, 0xc000007e, 0xc000007e, 0x7fffffff },
318 { 0x80000000, 0xc0007ffe, 0xc0007ffe, 0x7fffffff },
334 { 0xa0000000, 0xbfff8002, 0xbfff8002, 0x7fffffff },
372 { 0xa0000000, 0xbfffff82, 0xbfffff82, 0x7fffffff },
375 { 0x80000000, 0xc0000001, 0xc0000001, 0x7fffffff },
378 { 0x30000000, 0x7fffffff, 0x7fffffff, 0xfffffffe },
414 { 0x80000000, 0xc0007ffd, 0xc0007ffd, 0x7fffffff },
419 { 0x80000000, 0xf3333333, 0xf3333333, 0x7fffffff },
477 { 0x80000000, 0xc0000020, 0xc0000020, 0x7fffffff },
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/
d3dtypes.h 546 D3DLIGHT_FORCE_DWORD = 0x7fffffff
636 D3DOP_FORCE_DWORD = 0x7fffffff
661 D3DSHADE_FORCE_DWORD = 0x7fffffff
668 D3DFILL_FORCE_DWORD = 0x7fffffff
683 D3DFILTER_FORCE_DWORD = 0x7fffffff
700 D3DBLEND_FORCE_DWORD = 0x7fffffff
712 D3DTBLEND_FORCE_DWORD = 0x7fffffff
720 D3DTADDRESS_FORCE_DWORD = 0x7fffffff
727 D3DCULL_FORCE_DWORD = 0x7fffffff
739 D3DCMP_FORCE_DWORD = 0x7fffffff
    [all...]
  /external/vixl/test/aarch32/
test-simulator-cond-rd-rn-operand-const-a32.cc 202 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000},
220 {NoFlag, 0x00000000, 0x7fffffff}, {NoFlag, 0x00000000, 0x80000000},
235 {NoFlag, 0x00000001, 0x7ffffffe}, {NoFlag, 0x00000001, 0x7fffffff},
251 {NoFlag, 0x00000002, 0x7fffffff}, {NoFlag, 0x00000002, 0x80000000},
266 {NoFlag, 0x00000020, 0x7ffffffe}, {NoFlag, 0x00000020, 0x7fffffff},
282 {NoFlag, 0x0000007d, 0x7fffffff}, {NoFlag, 0x0000007d, 0x80000000},
297 {NoFlag, 0x0000007e, 0x7ffffffe}, {NoFlag, 0x0000007e, 0x7fffffff},
313 {NoFlag, 0x0000007f, 0x7fffffff}, {NoFlag, 0x0000007f, 0x80000000},
328 {NoFlag, 0x00007ffd, 0x7ffffffe}, {NoFlag, 0x00007ffd, 0x7fffffff},
    [all...]
test-simulator-cond-rd-rn-operand-const-t32.cc 186 {NoFlag, 0x7fffffff, 0x7fffffff}, {NoFlag, 0x80000000, 0x80000000},
204 {NoFlag, 0x00000000, 0x7fffffff}, {NoFlag, 0x00000000, 0x80000000},
219 {NoFlag, 0x00000001, 0x7ffffffe}, {NoFlag, 0x00000001, 0x7fffffff},
235 {NoFlag, 0x00000002, 0x7fffffff}, {NoFlag, 0x00000002, 0x80000000},
250 {NoFlag, 0x00000020, 0x7ffffffe}, {NoFlag, 0x00000020, 0x7fffffff},
266 {NoFlag, 0x0000007d, 0x7fffffff}, {NoFlag, 0x0000007d, 0x80000000},
281 {NoFlag, 0x0000007e, 0x7ffffffe}, {NoFlag, 0x0000007e, 0x7fffffff},
297 {NoFlag, 0x0000007f, 0x7fffffff}, {NoFlag, 0x0000007f, 0x80000000},
312 {NoFlag, 0x00007ffd, 0x7ffffffe}, {NoFlag, 0x00007ffd, 0x7fffffff},
    [all...]
test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc 185 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
187 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
205 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
209 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
213 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
218 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]
test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc 185 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
187 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
205 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
209 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
213 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
218 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
219 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
223 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
227 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
232 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
219 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
223 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
227 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
232 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
219 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
223 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
227 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
232 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc 199 {NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
201 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
219 {NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
223 {NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
227 {NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
232 {NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020}
    [all...]

Completed in 2019 milliseconds

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