| /external/llvm/test/MC/ARM/ |
| directive-arch-armv5.s | 3 @ This test case will check the default .ARM.attributes value for the
7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
14 @ CHECK-ASM: .arch armv5
16 @ CHECK-ATTR: FileAttributes {
17 @ CHECK-ATTR: Attribute {
18 @ CHECK-ATTR: TagName: CPU_name
19 @ CHECK-ATTR: Value:
[all...] |
| directive-arch-armv6-m.s | 3 @ This test case will check the default .ARM.attributes value for the
7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
14 @ CHECK-ASM: .arch armv6-m
16 @ CHECK-ATTR: FileAttributes {
17 @ CHECK-ATTR: Attribute {
18 @ CHECK-ATTR: TagName: CPU_name
19 @ CHECK-ATTR: Value: 6-
[all...] |
| directive-arch-armv7.s | 3 @ This test case will check the default .ARM.attributes value for the
7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
14 @ CHECK-ASM: .arch armv7
16 @ CHECK-ATTR: FileAttributes {
17 @ CHECK-ATTR: Attribute {
18 @ CHECK-ATTR: TagName: CPU_name
19 @ CHECK-ATTR: Value:
[all...] |
| directive-tlsdescseq-diagnostics.s | 8 @ CHECK: error: expected variable after '.tlsdescseq' directive
9 @ CHECK: .tlsdescseq
10 @ CHECK: ^
16 @ CHECK: error: unexpected token
17 @ CHECK: .tlsdescseq variable(tlsdesc)
18 @ CHECK: ^
24 @ CHECK: error: unexpected token
25 @ CHECK: .tlsdescseq variable,
26 @ CHECK: ^
32 @ CHECK: error: invalid variant 'tlsdescseq
[all...] |
| udf-arm-diagnostics.s | 10 @ CHECK: error: instruction 'udf' is not predicable, but condition code specified
11 @ CHECK: udfpl
12 @ CHECK: ^
16 @ CHECK: error: invalid operand for instruction
17 @ CHECK: udf #65536
18 @ CHECK: ^
|
| udf-thumb-diagnostics.s | 10 @ CHECK: error: conditional execution not supported in Thumb1
11 @ CHECK: udfpl
12 @ CHECK: ^
16 @ CHECK: error: instruction requires: arm-mode
17 @ CHECK: udf #256
18 @ CHECK: ^
|
| /external/llvm/test/MC/AsmParser/ |
| conditional_asm.s | 3 # CHECK: .byte 2
14 # CHECK: .byte 0
15 # CHECK-NOT: .byte 1
22 # CHECK: .byte 0
23 # CHECK: .byte 1
24 # CHECK-NOT: .byte 2
35 # CHECK: .byte 0
36 # CHECK-NOT: .byte 1
37 # CHECK-NOT: .byte 2
48 # CHECK-NOT: .byte
[all...] |
| ifnes.s | 3 # CHECK-NOT: .byte 0
4 # CHECK: .byte 1
11 # CHECK-NOT: .byte 0
12 # CHECK: .byte 1
19 # CHECK-NOT: .byte 0
20 # CHECK: .byte 1
|
| ifdef.s | 3 # CHECK-NOT: .byte 0
4 # CHECK: .byte 1
13 # CHECK: .byte 1
14 # CHECK-NOT: .byte 0
23 # CHECK-NOT: .byte 0
24 # CHECK: .byte 1
|
| ifndef.s | 3 # CHECK: .byte 1
4 # CHECK-NOT: byte 0
13 # CHECK-NOT: byte 0
14 # CHECK: .byte 1
23 # CHECK: .byte 1
24 # CHECK-NOT: byte 0
|
| /external/llvm/test/MC/Mips/ |
| mips64eb-fixups.s | 25 # CHECK: AddressSize: 64bit
26 # CHECK: Section {
27 # CHECK: Name: .fixups (12)
28 # CHECK-NEXT: Type: SHT_PROGBITS (0x1)
29 # CHECK-NEXT: Flags [ (0x0)
30 # CHECK-NEXT: ]
31 # CHECK-NEXT: Address: 0x0
32 # CHECK-NEXT: Offset: 0x40
33 # CHECK-NEXT: Size: 21
34 # CHECK-NEXT: Link:
[all...] |
| double-expand.s | 9 # CHECK-LABEL: branch:
10 # CHECK: bnez $2, foo
11 # CHECK: nop
12 # CHECK-NOT: nop
19 # CHECK-LABEL: cprestore:
20 # CHECK: .cprestore 16
21 # CHECK: lw $25, %call16(foo)($gp)
22 # CHECK: jalr $25
23 # CHECK: nop
24 # CHECK: lw $gp, 16($sp
[all...] |
| mips64extins.s | 4 dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
5 dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
6 dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
7 dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
8 dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1
9 dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13
|
| mips-hwr-register-names.s | 0 # Check the hardware registers
9 # CHECK: .set push
10 # CHECK-NEXT: .set mips32r2
11 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
12 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
14 # CHECK: .set push
15 # CHECK-NEXT: .set mips32r2
16 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
17 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
20 # CHECK: .set pus
[all...] |
| /external/clang/test/Analysis/ |
| traversal-path-unification.c | 9 #define CHECK(x) ((x) & 1)
11 #define CHECK(x) (x)
14 // CHECK: --BEGIN FUNCTION--
17 if (CHECK(i))
28 // CHECK: --END FUNCTION--
29 // CHECK-NOT: --END FUNCTION--
|
| /external/llvm/test/MC/AArch64/ |
| arm64-small-data-fixups.s | 12 ; CHECK: File: <stdin>
13 ; CHECK: Format: Mach-O arm64
14 ; CHECK: Arch: aarch64
15 ; CHECK: AddressSize: 64bit
16 ; CHECK: Relocations [
17 ; CHECK: Section __text {
18 ; CHECK: 0x9 0 1 1 ARM64_RELOC_SUBTRACTOR 0 bar
19 ; CHECK: 0x9 0 1 1 ARM64_RELOC_UNSIGNED 0 foo
20 ; CHECK: 0x8 0 0 1 ARM64_RELOC_SUBTRACTOR 0 bar
21 ; CHECK: 0x8 0 0 1 ARM64_RELOC_UNSIGNED 0 fo
[all...] |
| /external/llvm/test/MC/Hexagon/ |
| labels.s | 3 # CHECK: a:
6 # CHECK: r1:
9 # CHECK: r3:
10 # CHECK: nop
13 # CHECK: r5:4 = combine(r5, r4)
16 # CHECK: r0 = r1
17 # CHECK: p0 = tstbit(r0, #10)
18 # CHECK: if (!p0) jump
21 # CHECK: nop
22 # CHECK: r1 = add(r1, #4
[all...] |
| /external/llvm/test/MC/Mips/mips32r2/ |
| abiflags.s | 2 # RUN: FileCheck %s -check-prefix=CHECK-ASM
6 # RUN: FileCheck %s -check-prefix=CHECK-OBJ
8 # CHECK-ASM: .module fp=32
9 # CHECK-ASM: .set fp=64
12 # CHECK-OBJ: Section {
13 # CHECK-OBJ: Index: 5
14 # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
15 # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A
[all...] |
| /external/llvm/test/MC/Mips/mips32r3/ |
| abiflags.s | 2 # RUN: FileCheck %s -check-prefix=CHECK-ASM
6 # RUN: FileCheck %s -check-prefix=CHECK-OBJ
8 # CHECK-ASM: .module fp=32
9 # CHECK-ASM: .set fp=64
12 # CHECK-OBJ: Section {
13 # CHECK-OBJ: Index: 5
14 # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
15 # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A
[all...] |
| /external/llvm/test/MC/Mips/mips32r5/ |
| abiflags.s | 2 # RUN: FileCheck %s -check-prefix=CHECK-ASM
6 # RUN: FileCheck %s -check-prefix=CHECK-OBJ
8 # CHECK-ASM: .module fp=32
9 # CHECK-ASM: .set fp=64
12 # CHECK-OBJ: Section {
13 # CHECK-OBJ: Index: 5
14 # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
15 # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A
[all...] |
| /external/llvm/test/MC/Mips/msa/ |
| abiflags.s | 2 # RUN: FileCheck %s -check-prefix=CHECK-ASM
6 # RUN: FileCheck %s -check-prefix=CHECK-OBJ
8 # CHECK-ASM: .module fp=32
9 # CHECK-ASM: .set fp=64
12 # CHECK-OBJ: Section {
13 # CHECK-OBJ: Index: 5
14 # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
15 # CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A
[all...] |
| /external/llvm/test/MC/X86/ |
| validate-inst-intel.s | 6 # CHECK: error: invalid operand for instruction
7 # CHECK: int 65535
8 # CHECK: ^
12 # CHECK: error: invalid operand for instruction
13 # CHECK: int -129
14 # CHECK: ^
|
| /external/llvm/test/MC/SystemZ/ |
| regs-bad.s | 6 #CHECK: error: invalid operand for instruction
7 #CHECK: lr %f0,%r1
8 #CHECK: error: invalid operand for instruction
9 #CHECK: lr %a0,%r1
10 #CHECK: error: invalid operand for instruction
11 #CHECK: lr %r0,%f1
12 #CHECK: error: invalid operand for instruction
13 #CHECK: lr %r0,%a1
14 #CHECK: error: invalid operand for instruction
15 #CHECK: lr %r0,
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/AsmParser/ |
| ifdef.s | 3 # CHECK-NOT: .byte 0
4 # CHECK: .byte 1
13 # CHECK: .byte 1
14 # CHECK-NOT: .byte 0
23 # CHECK-NOT: .byte 0
24 # CHECK: .byte 1
|
| ifndef.s | 3 # CHECK: .byte 1
4 # CHECK-NOT: byte 0
13 # CHECK-NOT: byte 0
14 # CHECK: .byte 1
23 # CHECK: .byte 1
24 # CHECK-NOT: byte 0
|
