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  /external/llvm/test/MC/Mips/
set-mips-directives.s 41 # CHECK: .set noreorder
42 # CHECK: .set mips1
43 # CHECK: add $2, $2, $2
44 # CHECK: .set mips2
45 # CHECK: ll $2, -2($2)
46 # CHECK: .set mips3
47 # CHECK: dadd $2, $2, $2
48 # CHECK: .set mips4
49 # CHECK: ldxc1 $f8, $2($4)
50 # CHECK: .set mips
    [all...]
micromips-label-test-sections.s 12 # CHECK: Symbols [
13 # CHECK: Symbol {
14 # CHECK: Name: f
15 # CHECK: Binding: Local
16 # CHECK: Type: None
17 # CHECK: Other [ (0x80)
18 # CHECK: STO_MIPS_MICROMIPS
19 # CHECK: ]
20 # CHECK: Section: .text
21 # CHECK:
    [all...]
  /external/llvm/test/MC/ARM/
eh-link.s 10 @ CHECK: Section {
11 @ CHECK: Index: 4
12 @ CHECK-NEXT: Name: .text
13 @ CHECK-NEXT: Type: SHT_PROGBITS
14 @ CHECK-NEXT: Flags [
15 @ CHECK-NEXT: SHF_ALLOC
16 @ CHECK-NEXT: SHF_EXECINSTR
17 @ CHECK-NEXT: SHF_GROUP
18 @ CHECK-NEXT: ]
19 @ CHECK-NEXT: Address: 0x
    [all...]
directive-arch-armv8-a.s 3 @ This test case will check the default .ARM.attributes value for the
7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
14 @ CHECK-ASM: .arch armv8-a
16 @ CHECK-ATTR: FileAttributes {
17 @ CHECK-ATTR: Attribute {
18 @ CHECK-ATTR: TagName: CPU_name
19 @ CHECK-ATTR: Value: 8-
    [all...]
directive-arch-armv8.2-a.s 3 @ This test case will check the default .ARM.attributes value for the
7 @ RUN: | FileCheck %s -check-prefix CHECK-ASM
9 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
14 @ CHECK-ASM: .arch armv8.2-a
16 @ CHECK-ATTR: FileAttributes {
17 @ CHECK-ATTR: Attribute {
18 @ CHECK-ATTR: TagName: CPU_name
19 @ CHECK-ATTR: Value: 8.2-
    [all...]
thumb-types.s 55 @ CHECK: Symbol {
56 @ CHECK: Name: arm_function
57 @ CHECK: Value: 0x6
58 @ CHECK: Type: Function
59 @ CHECK: }
61 @ CHECK: Symbol {
62 @ CHECK: Name: explicit_data
63 @ CHECK: Value: 0x2
64 @ CHECK: Type: Object
65 @ CHECK:
    [all...]
arm-elf-symver.s 25 @ CHECK: Relocations [
26 @ CHECK-NEXT: Section {{.*}} .rel.text {
27 @ CHECK-NEXT: 0x0 R_ARM_ABS32 .text 0x0
28 @ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed 0x0
29 @ CHECK-NEXT: 0x8 R_ARM_ABS32 .text 0x0
30 @ CHECK-NEXT: 0xC R_ARM_ABS32 .text 0x0
31 @ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed 0x0
32 @ CHECK-NEXT: }
33 @ CHECK-NEXT: ]
35 @ CHECK: Symbol
    [all...]
directive-eabi_attribute.s 3 @ RUN: | llvm-readobj -arm-attributes | FileCheck %s --check-prefix=CHECK-OBJ
9 @ CHECK: .eabi_attribute 67, "2.09"
13 @ CHECK-OBJ: Tag: 67
14 @ CHECK-OBJ-NEXT: TagName: conformance
15 @ CHECK-OBJ-NEXT: Value: 2.09
17 @ CHECK: .eabi_attribute 4, "Cortex-A9"
18 @ CHECK-OBJ: Tag: 4
19 @ CHECK-OBJ-NEXT: TagName: CPU_raw_name
20 @ CHECK-OBJ-NEXT: Value: Cortex-A
    [all...]
directive-literals.s 9 @ CHECK-LABEL: short
10 @ CHECK-NEXT: .short 0
11 @ CHECK-NEXT: .short 57086
17 @ CHECK-LABEL: hword
18 @ CHECK-NEXT: .short 0
19 @ CHECK-NEXT: .short 57086
24 @ CHECK-LABEL: word
25 @ CHECK-NEXT: .long 3
directive-object_arch-2.s 9 @ CHECK: FileAttributes {
10 @ CHECK: Attribute {
11 @ CHECK: Tag: 5
12 @ CHECK: TagName: CPU_name
13 @ CHECK: Value: 7
14 @ CHECK: }
15 @ CHECK: Attribute {
16 @ CHECK: Tag: 6
18 @ CHECK: TagName: CPU_arch
19 @ CHECK: Description: ARM v
    [all...]
directive-object_arch.s 9 @ CHECK: FileAttributes {
10 @ CHECK: Attribute {
11 @ CHECK: Tag: 5
12 @ CHECK: TagName: CPU_name
13 @ CHECK: Value: 7
14 @ CHECK: }
15 @ CHECK: Attribute {
16 @ CHECK: Tag: 6
18 @ CHECK: TagName: CPU_arch
19 @ CHECK: Description: ARM v
    [all...]
  /external/llvm/test/MC/COFF/
seh-section-2.s 50 # CHECK: Symbols [
51 # CHECK: Symbol {
52 # CHECK: Name: .text
53 # CHECK: Section: .text (4)
54 # CHECK: AuxSymbolCount: 1
55 # CHECK: AuxSectionDef {
56 # CHECK: Length: 15
57 # CHECK: RelocationCount: 1
58 # CHECK: LineNumberCount: 0
59 # CHECK: Checksum: 0xE17CBB
    [all...]
  /external/valgrind/memcheck/tests/
unit_libcbase.c 41 #define CHECK(x) \
47 CHECK( ! VG_STREQ(NULL, NULL) ); // Nb: strcmp() considers these equal
48 CHECK( ! VG_STREQ(NULL, "ab") ); // Nb: strcmp() seg faults on this
49 CHECK( ! VG_STREQ("ab", NULL) ); // Nb: strcmp() seg faults on this
50 CHECK( ! VG_STREQ("", "a") );
51 CHECK( ! VG_STREQ("a", "") );
52 CHECK( ! VG_STREQ("abc", "abcd"));
53 CHECK( ! VG_STREQ("abcd", "abc") );
54 CHECK( ! VG_STREQ("Abcd", "abcd"));
55 CHECK( ! VG_STREQ("abcd", "Abcd"))
    [all...]
  /external/llvm/test/tools/llvm-readobj/ARM/
unwind.s 148 @ CHECK: UnwindInformation {
149 @ CHECK: UnwindIndexTable {
150 @ CHECK: SectionName: .ARM.exidx.personality
151 @ CHECK: Entries [
152 @ CHECK: Entry {
153 @ CHECK: FunctionAddress: 0x0
154 @ CHECK: FunctionName: __personality
155 @ CHECK: Model: Compact (Inline)
156 @ CHECK: PersonalityIndex: 0
157 @ CHECK: Opcodes
    [all...]
attribute-2.s 3 @ RUN: | llvm-readobj -arm-attributes - | FileCheck %s --check-prefix=CHECK-OBJ
5 @CHECK: .eabi_attribute 6, 2
6 @CHECK-OBJ: Tag: 6
7 @CHECK-OBJ-NEXT: Value: 2
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v4T
12 @CHECK: .eabi_attribute 9, 2
13 @CHECK-OBJ: Tag: 9
14 @CHECK-OBJ-NEXT: Value:
    [all...]
  /external/llvm/test/MC/AsmParser/
directive_values.s 3 # CHECK: TEST0:
4 # CHECK: .byte 0
8 # CHECK: TEST1:
9 # CHECK: .short 3
13 # CHECK: TEST2:
14 # CHECK: .long 8
18 # CHECK: TEST3:
19 # CHECK: .quad 9
31 # CHECK: TEST4
32 # CHECK: .quad
    [all...]
ifb.s 5 # CHECK-NOT: .byte 0
6 # CHECK: .byte 1
13 # CHECK-NOT: .byte 0
14 # CHECK: .byte 1
21 # CHECK-NOT: .byte 0
22 # CHECK: .byte 1
29 # CHECK-NOT: .byte 0
30 # CHECK: .byte 1
37 # CHECK-NOT: .byte 0
38 # CHECK: .byte
    [all...]
directive_space.s 3 # CHECK: TEST0:
4 # CHECK: .space 1
8 # CHECK: TEST1:
9 # CHECK: .space 2,3
13 # CHECK: TEST2:
14 # CHECK: .space 1
18 # CHECK: TEST3
19 # CHECK: .space TEST0-TEST1
directive_align.s 3 # CHECK: TEST0:
4 # CHECK: .p2align 1
8 # CHECK: TEST1:
9 # CHECK: .p2alignl 3, 0x0, 2
13 # CHECK: TEST2:
14 # CHECK: .balign 3, 10
directive_set.s 3 # CHECK: TEST0:
4 # CHECK: a = 0
5 # CHECK-NOT: .no_dead_strip a
9 # CHECK: TEST1:
10 # CHECK: a = 0
11 # CHECK-NOT: .no_dead_strip a
  /external/swiftshader/third_party/LLVM/test/MC/AsmParser/
directive_values.s 3 # CHECK: TEST0:
4 # CHECK: .byte 0
8 # CHECK: TEST1:
9 # CHECK: .short 3
13 # CHECK: TEST2:
14 # CHECK: .long 8
18 # CHECK: TEST3:
19 # CHECK: .quad 9
31 # CHECK: TEST4
32 # CHECK: .quad
    [all...]
directive_align.s 3 # CHECK: TEST0:
4 # CHECK: .align 1
8 # CHECK: TEST1:
9 # CHECK: .p2alignl 3, 0x0, 2
13 # CHECK: TEST2:
14 # CHECK: .balign 3, 10
  /external/llvm/test/MC/MachO/ARM/
static-movt-relocs.s 9 @ CHECK: Relocations [
10 @ CHECK-NEXT: Section __text {
11 @ CHECK-NEXT: Relocation {
12 @ CHECK-NEXT: Offset: 0x4
13 @ CHECK-NEXT: PCRel: 0
14 @ CHECK-NEXT: Length: 3
15 @ CHECK-NEXT: Type: ARM_RELOC_HALF (8)
16 @ CHECK-NEXT: Symbol: bar
17 @ CHECK-NEXT: }
18 @ CHECK-NEXT: Relocation
    [all...]
  /external/clang/test/Misc/
warning-flags.c 21 CHECK: Warnings without flags (84):
22 CHECK-NEXT: ext_excess_initializers
23 CHECK-NEXT: ext_excess_initializers_in_char_array_initializer
24 CHECK-NEXT: ext_expected_semi_decl_list
25 CHECK-NEXT: ext_explicit_specialization_storage_class
26 CHECK-NEXT: ext_initializer_string_for_char_array_too_long
27 CHECK-NEXT: ext_missing_declspec
28 CHECK-NEXT: ext_missing_whitespace_after_macro_name
29 CHECK-NEXT: ext_new_paren_array_nonconst
30 CHECK-NEXT: ext_plain_comple
    [all...]
  /external/llvm/test/MC/X86/
validate-inst-att.s 5 # CHECK: error: invalid operand for instruction
6 # CHECK: int $65535
7 # CHECK: ^
10 # CHECK: error: invalid operand for instruction
11 # CHECK: int $-129
12 # CHECK: ^
15 # CHECK: error: invalid operand for instruction
16 # CHECK: inb $65535, %al
17 # CHECK: ^
20 # CHECK: error: invalid operand for instructio
    [all...]

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