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  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/
MCInstBuilder.h 62 MCInstBuilder &addOperand(const MCOperand &Op) {
63 Inst.addOperand(Op);
  /prebuilts/go/darwin-x86/src/net/
error_posix_test.go 22 {&OpError{Op: "op", Err: syscall.EADDRNOTAVAIL}, true},
23 {&OpError{Op: "op", Err: &os.SyscallError{Syscall: "syscall", Err: syscall.EADDRNOTAVAIL}}, true},
27 {&OpError{Op: "op", Err: syscall.EINVAL}, false},
28 {&OpError{Op: "op", Err: &os.SyscallError{Syscall: "syscall", Err: syscall.EINVAL}}, false},
  /prebuilts/go/darwin-x86/test/fixedbugs/issue4932.dir/
foo.go 7 type Op struct{}
  /prebuilts/go/linux-x86/src/net/
error_posix_test.go 22 {&OpError{Op: "op", Err: syscall.EADDRNOTAVAIL}, true},
23 {&OpError{Op: "op", Err: &os.SyscallError{Syscall: "syscall", Err: syscall.EADDRNOTAVAIL}}, true},
27 {&OpError{Op: "op", Err: syscall.EINVAL}, false},
28 {&OpError{Op: "op", Err: &os.SyscallError{Syscall: "syscall", Err: syscall.EINVAL}}, false},
  /prebuilts/go/linux-x86/test/fixedbugs/issue4932.dir/
foo.go 7 type Op struct{}
  /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/
rewritePPC64.go 17 switch v.Op {
    [all...]
  /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/
rewritePPC64.go 17 switch v.Op {
    [all...]
  /external/swiftshader/third_party/subzero/pnacl-llvm/
NaClBitstreamReader.cpp 89 void NaClBitstreamCursor::skipAbbreviatedField(const NaClBitCodeAbbrevOp &Op) {
91 switch (Op.getEncoding()) {
96 (void)Read((unsigned)Op.getValue());
99 (void)ReadVBR64((unsigned)Op.getValue());
127 const NaClBitCodeAbbrevOp &Op = Abbv->getOperandInfo(i);
128 switch (Op.getEncoding()) {
130 skipAbbreviatedField(Op);
152 const NaClBitCodeAbbrevOp &Op, uint64_t &Value) {
153 switch (Op.getEncoding()) {
155 Value = Op.getValue()
    [all...]
  /external/capstone/
MCInst.h 49 bool MCOperand_isValid(const MCOperand *op);
51 bool MCOperand_isReg(const MCOperand *op);
53 bool MCOperand_isImm(const MCOperand *op);
55 bool MCOperand_isFPImm(const MCOperand *op);
57 bool MCOperand_isInst(const MCOperand *op);
60 unsigned MCOperand_getReg(const MCOperand *op);
63 void MCOperand_setReg(MCOperand *op, unsigned Reg);
65 int64_t MCOperand_getImm(MCOperand *op);
67 void MCOperand_setImm(MCOperand *op, int64_t Val);
69 double MCOperand_getFPImm(const MCOperand *op);
    [all...]
  /external/eigen/unsupported/Eigen/CXX11/src/Tensor/
TensorReductionSycl.h 102 template <typename Self, typename Op, bool Vectorizable>
103 struct FullReducer<Self, Op, const Eigen::SyclDevice, Vectorizable> {
108 static void run(const Self& self, Op& reducer, const Eigen::SyclDevice& dev, CoeffReturnType* output) {
144 Op functor = reducer;
156 const auto device_self_expr= TensorReductionOp<Op, Dims, decltype(device_expr.expr) ,MakeGlobalPointer>(device_expr.expr, dims, functor);
164 tmp_global_accessor.get_pointer()[globalid]=InnerMostDimReducer<decltype(device_self_evaluator), Op, false>::reduce(device_self_evaluator, red_factor*globalid, red_factor, const_cast<Op&>(functor));
170 tmp_global_accessor.get_pointer()[globalid]+=InnerMostDimReducer<decltype(device_self_evaluator), Op, false>::reduce(device_self_evaluator, red_factor*(rng), remaining, const_cast<Op&>(functor));
181 template <typename Self, typename Op>
    [all...]
  /external/llvm/lib/Target/BPF/
BPFISelLowering.h 40 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
50 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
51 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
52 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
  /external/skia/include/effects/
SkMorphologyImageFilter.h 32 enum Op {
37 virtual Op op() const = 0;
67 Op op() const override { return kDilate_Op; }
89 Op op() const override { return kErode_Op; }
  /external/skqp/include/effects/
SkMorphologyImageFilter.h 32 enum Op {
37 virtual Op op() const = 0;
67 Op op() const override { return kDilate_Op; }
89 Op op() const override { return kErode_Op; }
  /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
BlackfinISelLowering.h 37 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
55 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
56 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerADDE(SDValue Op, SelectionDAG &DAG) const;
  /external/swiftshader/third_party/LLVM/lib/Target/Sparc/
SparcISelLowering.h 47 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
52 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
96 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
97 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
  /external/tensorflow/tensorflow/java/src/main/java/org/tensorflow/op/
PrimitiveOp.java 16 package org.tensorflow.op;
21 * A base class for {@link Op} implementations that are backed by a single {@link Operation}.
26 public abstract class PrimitiveOp implements Op {
  /external/libcxx/test/std/experimental/filesystem/class.directory_entry/directory_entry.obs/
comparisons.pass.cpp 30 #define CHECK_OP(Op) \
31 static_assert(std::is_same<decltype(ce. operator Op (ce)), bool>::value, ""); \
32 static_assert(noexcept(ce.operator Op (ce)), "Operation must be noexcept" )
  /external/llvm/lib/IR/
IntrinsicInst.cpp 36 Value *Op = getArgOperand(0);
37 if (AllowNullOp && !Op)
40 auto *MD = cast<MetadataAsValue>(Op)->getMetadata();
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsELFStreamer.cpp 26 const MCOperand &Op = Inst.getOperand(OpIndex);
28 if (!Op.isReg())
31 unsigned Reg = Op.getReg();
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyISelDAGToDAG.cpp 59 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
98 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
104 OutOps.push_back(Op);
  /external/llvm/lib/Transforms/ObjCARC/
DependencyAnalysis.cpp 59 const Value *Op = *I;
60 if (IsPotentialRetainableObjPtr(Op, *PA.getAA()) &&
61 PA.related(Ptr, Op, DL))
106 const Value *Op = *OI;
107 if (IsPotentialRetainableObjPtr(Op, *PA.getAA()) &&
108 PA.related(Ptr, Op, DL))
115 const Value *Op = GetUnderlyingObjCPtr(SI->getPointerOperand(), DL);
118 return IsPotentialRetainableObjPtr(Op, *PA.getAA()) &&
119 PA.related(Op, Ptr, DL);
125 const Value *Op = *OI
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  /external/swiftshader/third_party/LLVM/lib/Target/PTX/
PTXISelLowering.h 44 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
46 virtual SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 281 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
287 /// \pre \p Op must be a generic virtual register with scalar or vector type.
288 /// \pre \p Op must be smaller than \p Res
291 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
293 /// Build and insert \p Res<def> = G_SEXT \p Op
296 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
297 /// high bit of \p Op (i.e. 2s-complement sign extended).
301 /// \pre \p Op must be a generic virtual register with scalar or vector type.
302 /// \pre \p Op must be smaller than \p Res
305 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
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  /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 301 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
307 /// \pre \p Op must be a generic virtual register with scalar or vector type.
308 /// \pre \p Op must be smaller than \p Res
311 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
313 /// Build and insert \p Res<def> = G_SEXT \p Op
316 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
317 /// high bit of \p Op (i.e. 2s-complement sign extended).
321 /// \pre \p Op must be a generic virtual register with scalar or vector type.
322 /// \pre \p Op must be smaller than \p Res
325 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 301 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
307 /// \pre \p Op must be a generic virtual register with scalar or vector type.
308 /// \pre \p Op must be smaller than \p Res
311 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
313 /// Build and insert \p Res<def> = G_SEXT \p Op
316 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
317 /// high bit of \p Op (i.e. 2s-complement sign extended).
321 /// \pre \p Op must be a generic virtual register with scalar or vector type.
322 /// \pre \p Op must be smaller than \p Res
325 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
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