| /external/compiler-rt/lib/builtins/arm/ |
| adddf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vadd.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| muldf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vmul.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| subdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vsub.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| divdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vdiv.f64 d5, d6, d7
|
| eqdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| gedf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| gtdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| ledf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| ltdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| nedf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| unorddf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| half-prec-neon.s | 4 vcvt.f32.f16 q5, d6
|
| simd_by_scalar_low_regbank.l | 10 [^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i16 d13,d6,d15\[3\]'
12 [^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f16 d13,d6,d15\[3\]'
14 [^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i32 d13,d6,d15\[3\]'
16 [^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f32 d13,d6,d15\[3\]'
18 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.i32 d5,d4,d6\[2\]'
19 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.i32 q5,q4,d6\[2\]'
20 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.f32 d5,d4,d6\[2\]'
21 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.f32 q5,q4,d6\[2\]'
22 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.i32 d5,d4,d6\[2\]'
23 [^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.i32 q5,q4,d6\[2\]
[all...] |
| vfpv3-32drs.s | 19 fldmiad r10!,{d5,d6}
21 fldmiax r10!,{d5,d6}
34 faddd d3,d5,d6
37 fsubd d3,d5,d6
40 fmuld d3,d5,d6
43 fdivd d3,d5,d6
46 fmacd d3,d5,d6
49 fmscd d3,d5,d6
52 fnmuld d3,d5,d6
55 fnmacd d3,d5,d6
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| reg-intel.d | 11 [ ]*[a-f0-9]+: 0f 71 d6 02 psrlw mm6,0x2
12 [ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw xmm6,0x2
17 [ ]*[a-f0-9]+: 0f 72 d6 02 psrld mm6,0x2
18 [ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld xmm6,0x2
23 [ ]*[a-f0-9]+: 0f 73 d6 02 psrlq mm6,0x2
24 [ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq xmm6,0x2
29 [ ]*[a-f0-9]+: 0f 71 d6 02 psrlw mm6,0x2
30 [ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw xmm6,0x2
35 [ ]*[a-f0-9]+: 0f 72 d6 02 psrld mm6,0x2
36 [ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld xmm6,0x
[all...] |
| reg.d | 9 [ ]*[a-f0-9]+: 0f 71 d6 02 psrlw \$0x2,%mm6
10 [ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw \$0x2,%xmm6
15 [ ]*[a-f0-9]+: 0f 72 d6 02 psrld \$0x2,%mm6
16 [ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld \$0x2,%xmm6
21 [ ]*[a-f0-9]+: 0f 73 d6 02 psrlq \$0x2,%mm6
22 [ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq \$0x2,%xmm6
27 [ ]*[a-f0-9]+: 0f 71 d6 02 psrlw \$0x2,%mm6
28 [ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw \$0x2,%xmm6
33 [ ]*[a-f0-9]+: 0f 72 d6 02 psrld \$0x2,%mm6
34 [ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld \$0x2,%xmm
[all...] |
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-aarch64/ |
| emit-relocs-534.d | 6 10000: 798009d6 ldrsh x22, \[x14,#4\]
|
| /bionic/libc/kernel/uapi/linux/ |
| uuid.h | 26 #define GUID_INIT(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
28 { { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } })
30 #define UUID_LE(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) GUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7)
|
| /external/kernel-headers/original/uapi/linux/ |
| uuid.h | 28 #define GUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
33 (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }})
37 #define UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
38 GUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
| movem-offset.d | 10 0: 4cee 047c ffe8 moveml %fp@\(-24\),%d2-%d6/%a2
11 6: 48ee 047c 0010 moveml %d2-%d6/%a2,%fp@\(16\)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/ |
| ticc-imm-reg.d | 17 1c: 91 d6 20 0a ta %i0 \+ 0xa
18 20: 91 d6 3f f6 ta %i0 \+ -10
|
| /external/libavc/common/arm/ |
| ih264_inter_pred_filters_luma_horz_a9q.s | 125 vld1.8 {d5, d6, d7}, [r0], r2 @// Load row1
128 vext.8 d28, d5, d6, #5 @//extract a[5] (column1,row1)
130 vext.8 d27, d6, d7, #5 @//extract a[5] (column2,row1)
133 vaddl.u8 q8, d27, d6 @// a0 + a5 (column2,row1)
136 vext.8 d28, d5, d6, #2 @//extract a[2] (column1,row1)
138 vext.8 d27, d6, d7, #2 @//extract a[2] (column2,row1)
144 vext.8 d28, d5, d6, #3 @//extract a[3] (column1,row1)
146 vext.8 d27, d6, d7, #3 @//extract a[3] (column2,row1)
152 vext.8 d28, d5, d6, #1 @//extract a[1] (column1,row1)
154 vext.8 d27, d6, d7, #1 @//extract a[1] (column2,row1
[all...] |
| ih264_inter_pred_luma_horz_qpel_a9q.s | 132 vld1.8 {d5, d6, d7}, [r0], r2 @// Load row1
135 vext.8 d28, d5, d6, #5 @//extract a[5] (column1,row1)
137 vext.8 d27, d6, d7, #5 @//extract a[5] (column2,row1)
140 vaddl.u8 q8, d27, d6 @// a0 + a5 (column2,row1)
143 vext.8 d28, d5, d6, #2 @//extract a[2] (column1,row1)
145 vext.8 d27, d6, d7, #2 @//extract a[2] (column2,row1)
151 vext.8 d28, d5, d6, #3 @//extract a[3] (column1,row1)
153 vext.8 d27, d6, d7, #3 @//extract a[3] (column2,row1)
159 vext.8 d28, d5, d6, #1 @//extract a[1] (column1,row1)
161 vext.8 d27, d6, d7, #1 @//extract a[1] (column2,row1
[all...] |
| ih264_inter_pred_chroma_a9q.s | 144 vld1.8 {d5, d6, d7}, [r0], r2 @ Load row1
146 vext.8 d8, d5, d6, #2
152 vext.8 d9, d6, d7, #2
156 vmull.u8 q6, d6, d30
164 vmov d1, d6
167 vld1.8 {d5, d6, d7}, [r0], r2 @ Load row1
170 vext.8 d8, d5, d6, #2
172 vext.8 d9, d6, d7, #2
181 vmull.u8 q6, d6, d30
211 vqrshrun.s16 d6, q2, #
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_luma_planar.s | 153 vdup.s8 d6, r9 @nt - 1 - row
196 vmlal.u8 q6, d6, d3 @(1)(nt-1-row) * src[2nt+1+col]
204 vsub.s8 d6, d6, d7 @(1)
212 vmlal.u8 q15, d6, d3 @(2)
218 vsub.s8 d6, d6, d7 @(2)
227 vmlal.u8 q14, d6, d3 @(3)
235 vsub.s8 d6, d6, d7 @(3
[all...] |
