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  /external/capstone/suite/MC/ARM/
neon-vst-encoding.s.cs 29 0x4f,0x64,0x02,0xf4 = vst3.16 {d6, d7, d8}, [r2]
33 0x8f,0x65,0x05,0xf4 = vst3.32 {d6, d8, d10}, [r5]
37 0x04,0x45,0x09,0xf4 = vst3.8 {d4, d6, d8}, [r9], r4
40 0x0d,0x64,0x08,0xf4 = vst3.8 {d6, d7, d8}, [r8]!
75 0x5d,0x69,0x82,0xf4 = vst2.32 {d6[0], d8[0]}, [r2:64]!
79 0x4f,0x66,0x82,0xf4 = vst3.16 {d6[1], d7[1], d8[1]}, [r2]
82 0xcf,0x6a,0x85,0xf4 = vst3.32 {d6[1], d8[1], d10[1]}, [r5]
88 0x2d,0x62,0x88,0xf4 = vst3.8 {d6[1], d7[1], d8[1]}, [r8]!
  /external/clang/test/CodeGenCXX/
mangle-ms-return-qualifiers.cpp 106 volatile B<A>* d6() { return 0; } function
107 // CHECK: "\01?d6@@YAPCV?$B@VA@@@@XZ"
  /external/libhevc/common/arm/
ihevc_weighted_pred_uni.s 190 vqmovun.s32 d6,q3 @vqmovun_s32(sto_res_tmp1) ii iteration
193 vmov.s32 d7,d6 @vcombine_u16(sto_res_tmp2, sto_res_tmp2) ii iteration
201 vqmovn.u16 d6,q3 @vqmovn_u16(sto_res_tmp3) ii iteration
202 vst1.32 {d6[0]},[r6],r3 @store pu1_dst ii iteration
ihevc_inter_pred_filters_luma_horz.s 209 @ vext.u8 d6,d0,d1,#6 @vector extract of src [0_6]
224 vld1.u32 {d6},[r12],r11
233 vmlal.u8 q4,d6,d30 @mul_res = vmlal_u8(src[0_6], coeffabs_6)@
305 vmlal.u8 q4,d6,d27 @mul_res = vmull_u8(src[0_3], coeffabs_3)@
350 vmlal.u8 q5,d6,d27 @mul_res = vmull_u8(src[0_3], coeffabs_3)@
405 vmlal.u8 q4,d6,d27 @mul_res = vmull_u8(src[0_3], coeffabs_3)@
470 vld1.u32 {d6},[r12],r11
479 @vext.u8 d6,d0,d1,#6 @vector extract of src[0_6]
512 vzip.32 d6,d18
521 vmlal.u8 q4,d6,d3
    [all...]
ihevc_inter_pred_chroma_horz.s 181 vmlsl.u8 q15,d6,d27 @mul_res = vmlal_u8(src[0_1], coeffabs_1)@
264 vmlsl.u8 q15,d6,d27 @mul_res = vmlal_u8(src[0_1], coeffabs_1)@
327 vmlsl.u8 q15,d6,d27 @mul_res = vmlal_u8(src[0_1], coeffabs_1)@
408 @vext.u8 d6,d0,d1,#6 @vector extract of src[0_6]
414 vld1.u32 {d6},[r4],r11 @vector load pu1_src
423 vmlal.u8 q5,d6,d26 @mul_res = vmlsl_u8(src[0_0], coeffabs_0)@
465 vld1.u32 {d6},[r12],r11 @(2)vector load pu1_src
491 vmlal.u8 q5,d6,d26 @(2)mul_res = vmlsl_u8(src[0_0], coeffabs_0)@
531 vld1.u32 {d6},[r12],r11 @(2_1)vector load pu1_src
570 vmlal.u8 q5,d6,d26 @(2_1)mul_res = vmlsl_u8(src[0_0], coeffabs_0)
    [all...]
ihevc_inter_pred_luma_horz_w16out.s 213 vld1.u32 {d6},[r12],r11
222 @vext.u8 d6,d0,d1,#6 @vector extract of src[0_6]
255 vzip.32 d6,d18
264 vmlal.u8 q4,d6,d30
310 @ vext.u8 d6,d0,d1,#6 @vector extract of src[0_6]
321 vld1.u32 {d6},[r12],r11
326 vmlal.u8 q4,d6,d30
373 @ vext.u8 d6,d0,d1,#6 @vector extract of src [0_6]
388 vld1.u32 {d6},[r12],r11
397 vmlal.u8 q4,d6,d30 @mul_res = vmlal_u8(src[0_6], coeffabs_6)
    [all...]
  /prebuilts/go/darwin-x86/src/math/
erfinv.go 48 d6 = 7.7441459065157709165577218e-4
103 z2 = ((((((d7*r+d6)*r+d5)*r+d4)*r+d3)*r+d2)*r+d1)*r + d0
47 d6 = 7.7441459065157709165577218e-4 const
  /prebuilts/go/darwin-x86/test/fixedbugs/
issue7044.go 21 d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13, d14, d15 :=
25 float32(d0), float32(d1), float32(d2), float32(d3), float32(d4), float32(d5), float32(d6), float32(d7), float32(d8), float32(d9), float32(d10), float32(d11), float32(d12), float32(d13), float32(d14), float32(d15)
  /prebuilts/go/linux-x86/src/math/
erfinv.go 48 d6 = 7.7441459065157709165577218e-4
103 z2 = ((((((d7*r+d6)*r+d5)*r+d4)*r+d3)*r+d2)*r+d1)*r + d0
47 d6 = 7.7441459065157709165577218e-4 const
  /prebuilts/go/linux-x86/test/fixedbugs/
issue7044.go 21 d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13, d14, d15 :=
25 float32(d0), float32(d1), float32(d2), float32(d3), float32(d4), float32(d5), float32(d6), float32(d7), float32(d8), float32(d9), float32(d10), float32(d11), float32(d12), float32(d13), float32(d14), float32(d15)
  /system/core/debuggerd/crasher/arm/
crashglue.S 25 fconstd d6, #6
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
vfp-neon-syntax-inc.s 143 \op\n\cond r0,{d3-d6}
144 \op\ia\cond r0,{d3-d6}
145 \op\ia\cond r0!,{d3-d6}
146 \op\db\cond r0!,{d3-d6}
vfp1.s 196 fcmpzd d6
220 fcpydeq d6, d12
229 fmscdeq d5, d6, d11
232 fnmscdeq d7, d6, d11
248 fldmeadeq r6!, {d6}
vfp1_t2.s 199 fcmpzd d6
225 fcpydeq d6, d12
235 fmscdeq d5, d6, d11
239 fnmscdeq d7, d6, d11
258 fldmeadeq r6!, {d6}
vfp1.d 138 0+200 <[^>]*> eeb56b40 (vcmp\.f64 d6, #0.0|fcmpzd d6)
153 0+23c <[^>]*> 0eb06b4c (vmoveq\.f64|fcpydeq) d6, d12
159 0+254 <[^>]*> 0e165b0b (vnmlseq\.f64|fmscdeq) d5, d6, d11
162 0+260 <[^>]*> 0e167b4b (vnmlaeq\.f64|fnmscdeq) d7, d6, d11
172 0+288 <[^>]*> 0d366b02 vldmdbeq r6!, {d6}
  /external/libmpeg2/common/arm/
impeg2_inter_pred.s 235 vld1.8 {d6}, [r14], r2 @// fourth row hence r4 = D6
238 vrhadd.u8 d9, d1, d6 @// estimated row 4 = D9
315 vld1.8 {d6, d7}, [r14], r2 @row6
324 vext.8 d20, d6, d7, #1 @Extract pixels (1-8) of row6
364 vst1.8 d6, [r12], r3 @store row6
427 vld1.8 {d6, d7}, [r14], r2 @row6
439 vext.8 d7, d6, d7, #1 @Extract pixels (1-8) of row6
483 vaddl.u8 q3, d6, d7 @operate row6
685 vld1.8 {d6, d7}, [r4]! @row4 src
    [all...]
  /packages/apps/Gallery2/src/com/android/gallery3d/filtershow/filters/
SplineMath.java 119 double d6 = 1.0 / 6.0; local
131 system[i][0] = d6 * deltaPrevX; // a_i
133 system[i][2] = d6 * deltaNextX; // c_i
  /external/v8/src/compiler/
wasm-linkage.cc 91 #define FP_PARAM_REGISTERS d0, d1, d2, d3, d4, d5, d6, d7
100 #define FP_PARAM_REGISTERS d0, d1, d2, d3, d4, d5, d6, d7
127 #define FP_PARAM_REGISTERS d1, d2, d3, d4, d5, d6, d7, d8
136 #define FP_PARAM_REGISTERS d0, d2, d4, d6
137 #define FP_RETURN_REGISTERS d0, d2, d4, d6
  /external/libavc/common/arm/
ih264_intra_pred_luma_4x4_a9q.s 656 vmov.8 d6, d5
659 vst1.16 {d6[2]}, [r1], r5
737 vext.8 d6, d4, d4, #1
739 vst1.32 {d6[0]}, [r1], r3
819 vmov d6, d4
820 vext.8 d6, d5, d4, #1
822 vst1.8 {d6[0]}, [r1]!
823 vtrn.8 d6, d5 @
825 vtrn.8 d4, d6 @
827 vst1.16 {d6[0]}, [r1], r
    [all...]
  /external/llvm/test/MC/ARM/
neon-mul-encoding.s 112 vmul.f32 d6, d5[1]
125 vmul.i32 d6, d3, d2[0]
128 vmul.f32 d3, d6, d5[1]
144 @ CHECK: vmul.f32 d6, d6, d5[1] @ encoding: [0x65,0x69,0xa6,0xf2]
157 @ CHECK: vmul.i32 d6, d3, d2[0] @ encoding: [0x42,0x68,0xa3,0xf2]
160 @ CHECK: vmul.f32 d3, d6, d5[1] @ encoding: [0x65,0x39,0xa6,0xf2]
  /external/boringssl/src/crypto/poly1305/
poly1305_arm_asm.S 196 # asm 2: vld1.8 {<z0=d6},[<input_1=r1]!
197 vld1.8 {d6},[r1]!
373 # asm 2: vst1.8 {<z0=d6-<z0=d7},[<ptr=r1,: 128]
374 vst1.8 {d6-d7},[r1,: 128]
489 # asm 2: vld1.8 {>z0=d6->z0=d7},[<ptr=r2,: 128]
490 vld1.8 {d6-d7},[r2,: 128]
509 # asm 2: vmlal.u32 <r4=q15,<x4=d20,<z0=d6
510 vmlal.u32 q15,d20,d6
549 # asm 2: vmlal.u32 <r3=q4,<x23=d19,<z0=d6
550 vmlal.u32 q4,d19,d6
    [all...]
  /external/valgrind/none/tests/arm/
neon64.c 673 TESTINSN_imm("vorr.i16 d6", d6, 0x700);
735 TESTINSN_bin("vand d4, d6, d5", d4, d6, i8, 0xff, d5, i16, 0x57);
742 TESTINSN_bin("vbic d4, d6, d5", d4, d6, i8, 0xff, d5, i16, 0x57);
763 TESTINSN_bin("veor d4, d6, d5", d4, d6, i8, 0xff, d5, i16, 0x57);
774 TESTINSN_bin("vbsl d4, d6, d5", d4, d6, i8, 0xff, d5, i16, 0x57)
    [all...]
neon128.c     [all...]
  /external/libopus/celt/arm/
celt_pitch_xcorr_arm_gnu.s 83 VLD1.16 {d6, d7}, [r4]!
90 VMLAL.S16 q0, d3, d6[0]
94 VMLAL.S16 q0, d16, d6[1]
98 VMLAL.S16 q0, d16, d6[2]
102 VMLAL.S16 q0, d16, d6[3]
110 VLD1.16 d6, [r4]!
116 VMLAL.S16 q0, d4, d6[0]
118 VMLAL.S16 q0, d16, d6[1]
120 VMLAL.S16 q0, d16, d6[2]
122 VMLAL.S16 q0, d16, d6[3
    [all...]
  /external/autotest/server/cros/
rf_switch_1_ap_box_2_ap_list.conf 369 [18:d6:c7:2b:0d:a3]
375 bss = 18:d6:c7:2b:0d:a3
376 wan mac = 18:d6:c7:2b:0d:a4
382 [18:d6:c7:2b:0d:a2]
388 bss5 = 18:d6:c7:2b:0d:a2
389 wan mac = 18:d6:c7:2b:0d:a4

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