| /external/libhevc/common/arm/ |
| ihevc_itrans_recon_8x8.s | 139 @// row 1 first half - d6 - y1
196 vld1.16 d6,[r0]!
198 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0)
200 vmull.s16 q13,d6,d0[3] @// y1 * cos3(part of b1)
202 vmull.s16 q14,d6,d1[1] @// y1 * sin3(part of b2)
204 vmull.s16 q15,d6,d1[3] @// y1 * sin1(part of b3)
224 @// vld1.16 d6,[r0]!
277 vqrshrn.s32 d6,q14,#shift_stage1_idct @// r1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
295 vld1.16 d6,[r0]!
308 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0
[all...] |
| ihevc_padding.s | 146 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
147 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
148 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
149 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
150 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
265 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
266 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
267 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
268 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes store
269 vst1.8 {d6,d7},[r7]! @128/8 = 16 bytes stor
[all...] |
| ihevc_inter_pred_chroma_vert.s | 159 vqrshrun.s16 d6,q3,#6 @shifts right
163 vst1.8 {d6},[r1]! @stores the loaded value
188 vld1.32 {d6[0]},[r0] @vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp1, 0
191 vld1.32 {d6[1]},[r6],r2 @loads pu1_src_tmp
192 vdup.32 d7,d6[1]
197 vmlsl.u8 q2,d6,d0
237 vld1.8 {d6},[r6],r2 @load and increment
242 vmlal.u8 q15,d6,d2
246 vmull.u8 q14,d6,d1 @mul_res 2
258 vmlsl.u8 q13,d6,d
[all...] |
| ihevc_intra_pred_chroma_mode2.s | 135 vld2.8 {d6,d7},[r10],r8
154 vrev64.8 d22,d6
195 vld2.8 {d6,d7},[r10],r8
218 vrev64.8 d22,d6
284 vshl.i64 d6,d18,#32
288 vrev64.8 d6,d6
292 vzip.8 d6,d7
293 vst1.8 {d6},[r2],r3
|
| ihevc_inter_pred_chroma_vert_w16out.s | 187 vld1.32 {d6[0]},[r0] @vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp1, 0
190 vld1.32 {d6[1]},[r6],r2 @loads pu1_src_tmp
191 vdup.32 d7,d6[1]
196 vmlsl.u8 q2,d6,d0
236 vld1.8 {d6},[r6],r2 @load and increment
241 vmlal.u8 q15,d6,d2
245 vmull.u8 q14,d6,d1 @mul_res 2
256 vmlsl.u8 q13,d6,d0
267 vld1.8 {d6},[r6],r2 @load and increment
284 vmlal.u8 q15,d6,d
[all...] |
| ihevc_intra_pred_filters_luma_mode_11_to_17.s | 290 vmovn.s16 d6, q11
307 vand d6, d6, d29 @fract values in d1/ idx values in d0
316 vsub.s8 d7, d28, d6 @32-fract
324 vmlal.u8 q12, d13, d6 @mul (row 0)
334 vmlal.u8 q11, d17, d6 @mul (row 1)
345 vmlal.u8 q10, d15, d6 @mul (row 2)
356 vmlal.u8 q9, d11, d6 @mul (row 3)
367 vmlal.u8 q12, d13, d6 @mul (row 4)
378 vmlal.u8 q11, d17, d6 @mul (row 5
[all...] |
| ihevc_intra_pred_luma_mode_3_to_9.s | 180 vmovn.s16 d6, q11
195 vand d6, d6, d29 @fract values in d1/ idx values in d0
206 vsub.s8 d7, d28, d6 @32-fract
214 vmlal.u8 q12, d13, d6 @mul (row 0)
224 vmlal.u8 q11, d17, d6 @mul (row 1)
235 vmlal.u8 q10, d15, d6 @mul (row 2)
246 vmlal.u8 q9, d11, d6 @mul (row 3)
257 vmlal.u8 q12, d13, d6 @mul (row 4)
268 vmlal.u8 q11, d17, d6 @mul (row 5
[all...] |
| ihevc_intra_pred_chroma_mode_3_to_9.s | 172 vmovn.s16 d6, q11
188 vand d6, d6, d29 @fract values in d1/ idx values in d0
202 vsub.s8 d7, d28, d6 @32-fract
212 vmlal.u8 q12, d13, d6 @mul (row 0)
222 vmlal.u8 q11, d17, d6 @mul (row 1)
233 vmlal.u8 q10, d15, d6 @mul (row 2)
244 vmlal.u8 q9, d11, d6 @mul (row 3)
255 vmlal.u8 q12, d13, d6 @mul (row 4)
268 vmlal.u8 q11, d17, d6 @mul (row 5
[all...] |
| ihevc_intra_pred_luma_mode2.s | 136 vld1.8 {d6},[r0],r8
154 vrev64.8 d14,d6
194 vld1.8 {d6},[r0],r8
218 vrev64.8 d14,d6
250 vld1.8 {d6},[r10]
260 vrev64.8 d7,d6
|
| ihevc_intra_pred_luma_mode_18_34.s | 145 vld1.8 {d6},[r8],r6
172 vst1.8 {d6},[r10],r3
182 vld1.8 {d6},[r8],r6
211 vst1.8 {d6},[r10],r3
221 vld1.8 {d6},[r8],r6
242 vst1.8 {d6},[r10],r3
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
| mcf-mov3q.d | 16 e: ad76 6803 mov3ql #6,%fp@\(0+03,%d6:l\)
|
| mcf-mac.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/rx/ |
| sccnd.d | 55 92: fc d6 02 fe 7f scc\.w 65532\[r0\]
56 97: fc d6 f2 fe 7f scc\.w 65532\[r15\]
72 d6: fc d5 f2 7e scc\.w 252\[r15\]
73 da: fc d6 02 fe 7f scc\.w 65532\[r0\]
74 df: fc d6 f2 fe 7f scc\.w 65532\[r15\]
91 122: fc d6 00 fe 7f sceq\.w 65532\[r0\]
92 127: fc d6 f0 fe 7f sceq\.w 65532\[r15\]
109 16a: fc d6 00 fe 7f sceq\.w 65532\[r0\]
110 16f: fc d6 f0 fe 7f sceq\.w 65532\[r15\]
127 1b2: fc d6 04 fe 7f scgtu\.w 65532\[r0\
[all...] |
| /external/libpng/arm/ |
| filter_neon.S | 69 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
72 vadd.u8 d2, d1, d6
91 vext.8 d6, d22, d23, #6
96 vadd.u8 d2, d1, d6
124 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
131 vadd.u8 d2, d2, d6
155 vext.8 d6, d22, d23, #6
165 vadd.u8 d2, d2, d6
197 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
204 vadd.u8 d2, d2, d6
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-vld-encoding.s | 12 vld1.16 {d4, d5, d6}, [r3:64]
13 vld1.32 {d5, d6, d7}, [r3]
14 vld1.64 {d6, d7, d8}, [r3:64]
16 vld1.16 {d4, d5, d6, d7}, [r3:64]
17 vld1.32 {d5, d6, d7, d8}, [r3]
18 vld1.64 {d6, d7, d8, d9}, [r3:64]
39 vld1.16 {d4, d5, d6}, [r3:64]!
40 vld1.32 {d5, d6, d7}, [r3]!
41 vld1.64 {d6, d7, d8}, [r3:64]!
44 vld1.16 {d4, d5, d6}, [r3:64], r
[all...] |
| eh-directive-vsave.s | 50 .vsave {d0, d1, d2, d3, d4, d5, d6, d7}
51 vpush {d0, d1, d2, d3, d4, d5, d6, d7}
52 vpop {d0, d1, d2, d3, d4, d5, d6, d7}
63 .vsave {d2, d3, d4, d5, d6, d7}
64 vpush {d2, d3, d4, d5, d6, d7}
65 vpop {d2, d3, d4, d5, d6, d7}
|
| /external/pdfium/third_party/libpng16/arm/ |
| filter_neon.S | 69 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
72 vadd.u8 d2, d1, d6
91 vext.8 d6, d22, d23, #6
96 vadd.u8 d2, d1, d6
124 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
131 vadd.u8 d2, d2, d6
155 vext.8 d6, d22, d23, #6
165 vadd.u8 d2, d2, d6
197 vld4.32 {d4[],d5[],d6[],d7[]}, [r1,:128]
204 vadd.u8 d2, d2, d6
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| neon-psyn.s | 37 moo .dn d6
50 el2 .dn d6.16[1]
65 vld3 {d2.s16[1], d4.s16[1], d6.s16[1]}, [r10]
|
| ual-vcmp.s | 22 vcmpe.f64 d6, #0.00
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_Resize.S | 44 * and accumulate them by the coefficients in d6[0..3], leaving the results in
63 vmull.u16 q12, d18, d6[1]
64 vmull.u16 q13, d19, d6[1]
65 vmlsl.u16 q12, d16, d6[0]
66 vmlsl.u16 q13, d17, d6[0]
67 vmlal.u16 q12, d20, d6[2]
68 vmlal.u16 q13, d21, d6[2]
69 vmlsl.u16 q12, d22, d6[3]
70 vmlsl.u16 q13, d23, d6[3]
91 vmull.u16 q12, d18, d6[1
[all...] |
| /external/capstone/suite/MC/AArch64/ |
| neon-scalar-dup.s.cs | 12 0xa6,0x04,0x18,0x5e = dup d6, v5.d[1]
23 0xa6,0x04,0x18,0x5e = dup d6, v5.d[1]
|
| /external/clang/test/CXX/special/class.inhctor/ |
| p7.cpp | 38 struct D6 : B5 {
40 template<typename T> D6(T);
42 D6 d6(0);
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| rtm-intel.d | 19 [ ]*[a-f0-9]+: 0f 01 d6 xtest
|
| rtm.d | 18 [ ]*[a-f0-9]+: 0f 01 d6 xtest
|
| x86-64-rtm.d | 18 [ ]*[a-f0-9]+: 0f 01 d6 xtest
|
