| /external/python/cpython3/Lib/test/ |
| test_devpoll.py | 39 rd, wr = os.pipe()
40 p.register(rd)
41 p.modify(rd, select.POLLIN)
43 readers.append(rd)
45 r2w[rd] = wr
46 w2r[wr] = rd
63 rd = ready_readers[0]
64 buf = os.read(rd, MSG_LEN)
67 os.close(r2w[rd]) ; os.close(rd)
[all...] |
| test_poll.py | 45 rd, wr = os.pipe()
46 p.register(rd)
47 p.modify(rd, select.POLLIN)
49 readers.append(rd)
51 r2w[rd] = wr
52 w2r[wr] = rd
68 rd = random.choice(ready_readers)
69 buf = os.read(rd, MSG_LEN)
72 os.close(r2w[rd]) ; os.close( rd )
[all...] |
| /prebuilts/gdb/darwin-x86/lib/python2.7/test/ |
| test_poll.py | 37 rd, wr = os.pipe()
38 p.register(rd)
39 p.modify(rd, select.POLLIN)
41 readers.append(rd)
43 r2w[rd] = wr
44 w2r[wr] = rd
60 rd = random.choice(ready_readers)
61 buf = os.read(rd, MSG_LEN)
64 os.close(r2w[rd]) ; os.close( rd )
[all...] |
| /prebuilts/gdb/linux-x86/lib/python2.7/test/ |
| test_poll.py | 37 rd, wr = os.pipe()
38 p.register(rd)
39 p.modify(rd, select.POLLIN)
41 readers.append(rd)
43 r2w[rd] = wr
44 w2r[wr] = rd
60 rd = random.choice(ready_readers)
61 buf = os.read(rd, MSG_LEN)
64 os.close(r2w[rd]) ; os.close( rd )
[all...] |
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/ |
| test_poll.py | 37 rd, wr = os.pipe()
38 p.register(rd)
39 p.modify(rd, select.POLLIN)
41 readers.append(rd)
43 r2w[rd] = wr
44 w2r[wr] = rd
60 rd = random.choice(ready_readers)
61 buf = os.read(rd, MSG_LEN)
64 os.close(r2w[rd]) ; os.close( rd )
[all...] |
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/ |
| test_poll.py | 37 rd, wr = os.pipe()
38 p.register(rd)
39 p.modify(rd, select.POLLIN)
41 readers.append(rd)
43 r2w[rd] = wr
44 w2r[wr] = rd
60 rd = random.choice(ready_readers)
61 buf = os.read(rd, MSG_LEN)
64 os.close(r2w[rd]) ; os.close( rd )
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.h | 174 inline void And(const Register& rd,
177 inline void Ands(const Register& rd,
180 inline void Bic(const Register& rd,
183 inline void Bics(const Register& rd,
186 inline void Orr(const Register& rd,
189 inline void Orn(const Register& rd,
192 inline void Eor(const Register& rd,
195 inline void Eon(const Register& rd,
199 void LogicalMacro(const Register& rd,
205 inline void Add(const Register& rd,
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| t2-branch-global.d | 4 #objdump: -rd
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cris/ |
| rd-bcnst2.d | 4 # Consistency check, corresponding to rd-bcnst2-pic.d.
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/ |
| mcdper.d | 10 0: 83 43 80 00 rd %mcdper, %g1
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-arm/ |
| rodata-merge-map3.s | 1 @ This file contains the 3rd contribution, which is expected to
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-s390/ |
| s390.exp | 41 {{readelf -Ssrl tlspic.rd} {objdump -dzrj.text tlspic.dd}
48 {{readelf -Ssrl tlsbin.rd} {objdump -dzrj.text tlsbin.dd}
61 {{readelf -WSsrl tlspic_64.rd} {objdump -dzrj.text tlspic_64.dd}
69 {{readelf -WSsrl tlsbin_64.rd} {objdump -dzrj.text tlsbin_64.dd}
|
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.cc | 414 const Register& rd,
417 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm) || rd.Is64Bits());
440 if (OneInstrMoveImmediateHelper(masm, rd, imm)) {
444 unsigned reg_size = rd.GetSizeInBits();
467 temp = rd.IsSP() ? temps.AcquireSameSizeAs(rd) : rd;
498 if (rd.IsSP()) {
499 if (emit_code) masm->mov(rd, temp);
730 void MacroAssembler::And(const Register& rd,
[all...] |
| /external/curl/tests/libtest/ |
| lib1506.c | 94 fd_set rd, wr, exc; local
107 FD_ZERO(&rd);
111 multi_fdset(m, &rd, &wr, &exc, &maxfd);
115 select_test(maxfd + 1, &rd, &wr, &exc, &interval);
|
| lib525.c | 114 fd_set rd, wr, exc; local
127 FD_ZERO(&rd);
131 multi_fdset(m, &rd, &wr, &exc, &maxfd);
135 select_test(maxfd + 1, &rd, &wr, &exc, &interval);
|
| lib526.c | 86 fd_set rd, wr, exc; local
128 FD_ZERO(&rd);
132 multi_fdset(m, &rd, &wr, &exc, &maxfd);
136 select_test(maxfd + 1, &rd, &wr, &exc, &interval);
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-ia64/ |
| ia64.exp | 42 {{readelf -WSsrl tlspic.rd} {objdump -drj.text tlspic.dd}
49 {{readelf -WSsrl tlsbin.rd} {objdump -drj.text tlsbin.dd}
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-sh/ |
| sh-vxworks.exp | 31 {{readelf --relocs vxworks1-lib.rd}
38 {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1$suffix.dd}}
|
| /external/v8/src/crankshaft/arm64/ |
| delayed-masm-arm64.cc | 98 void DelayedMasm::Load(const CPURegister& rd, const MemOperand& operand) {
100 pending_register_.IsSameSizeAndType(rd)) {
108 DCHECK(!IsScratchRegister(rd) || scratch_register_acquired_);
109 __ Ldp(pending_register_, rd, pending_address_src_);
116 DCHECK(!IsScratchRegister(rd) || scratch_register_acquired_);
117 __ Ldp(rd, pending_register_, operand);
125 pending_register_ = rd;
133 void DelayedMasm::Store(const CPURegister& rd, const MemOperand& operand) {
135 pending_register_.IsSameSizeAndType(rd)) {
141 __ Stp(pending_register_, rd, pending_address_dst_)
[all...] |
| /external/valgrind/none/tests/mips64/ |
| logical_instructions.stdout.exp | 1 and $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
2 and $s0, $s1, $s2 :: rd 0x1284020, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
3 and $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
4 and $s0, $s1, $s2 :: rd 0x4c834002122303, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
5 and $t0, $t1, $t2 :: rd 0x8003b4a, rs 0x9823b6e, rt 0xffffffffb8757bda
6 and $s0, $s1, $s2 :: rd 0x1328080203050071, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
7 and $t0, $t1, $t2 :: rd 0xc002649, rs 0xd4326d9, rt 0xffffffffbcb4666d
8 and $s0, $s1, $s2 :: rd 0x20044c571216a462, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
9 and $t0, $t1, $t2 :: rd 0x2003648, rs 0x130476dc, rt 0xffffffffa2f33668
10 and $s0, $s1, $s2 :: rd 0x40a040000401a502, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af1
[all...] |
| /system/update_engine/update_manager/ |
| real_random_provider.cc | 60 int rd = fread(buf + buf_rd, 1, sizeof(result) - buf_rd, fp_.get()); variable
61 if (rd == 0 || ferror(fp_.get())) {
69 buf_rd += rd;
|
| /external/webp/src/enc/ |
| quant_enc.c | 54 const VP8ModeScore* const rd) {
92 (int)rd->D, (int)rd->SD, (int)rd->R, (int)rd->H, (int)rd->nz,
93 (int)rd->score);
95 printf("Mode: %d\n", rd->mode_i16);
97 for (i = 0; i < 16; ++i) printf("%3d ", rd->y_dc_levels[i]);
101 for (i = 0; i < 16; ++i) printf("%d ", rd->modes_i4[i])
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 215 reg_name[i.RType.rd],
221 db_printf("rotr\t%s,%s,%d", reg_name[i.RType.rd],
226 db_printf("rotrv\t%s,%s,%s", reg_name[i.RType.rd],
245 reg_name[i.RType.rd],
257 reg_name[i.RType.rd],
264 db_printf("\t%s", reg_name[i.RType.rd]);
301 reg_name[i.RType.rd],
311 reg_name[i.RType.rd],
328 i.RType.rd+1);
334 i.RType.rd-i.RType.shamt+1)
[all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | 238 // Print the integer value of the rd field, when it is not used as reg.
245 // Print the integer value of the rd field, when used as 'ext' size.
252 // Print the integer value of the rd field, when used as 'ins' size.
501 } else if (format[1] == 'd') { // 'rd: rd register.
[all...] |
| /libcore/luni/src/test/java/libcore/java/io/ |
| OldPipedWriterTest.java | 88 PipedReader rd = new PipedReader(); local
91 pw = new PipedWriter(rd);
96 readerThread = new Thread(reader = new PReader(rd), "Constructor(Reader)");
108 rd = new PipedReader(new PipedWriter());
110 pw = new PipedWriter(rd);
118 PipedReader rd = new PipedReader(); local
119 pw = new PipedWriter(rd);
120 reader = new PReader(rd);
129 PipedReader rd = new PipedReader(); local
133 pw.connect(rd);
[all...] |
