| /prebuilts/go/linux-x86/src/runtime/ |
| defs_dragonfly_amd64.go | 23 _MADV_FREE = 0x5
33 _SIGTRAP = 0x5
65 _FPE_FLTUND = 0x5
|
| defs_freebsd_386.go | 28 _MADV_FREE = 0x5
45 _SIGTRAP = 0x5
77 _FPE_FLTUND = 0x5
|
| defs_freebsd_amd64.go | 28 _MADV_FREE = 0x5
45 _SIGTRAP = 0x5
77 _FPE_FLTUND = 0x5
|
| /external/libhevc/common/arm64/ |
| ihevc_deblk_luma_vert.s | 54 sxtw x5,w5
67 add x7,x3,x5,lsl #1
193 cmp x11,x5
200 // registers which cannont be altered : x3,x4 x5,x6,x12,x13,x0,x1,x11
204 asr x10,x5,#2
233 cmp x8,x5,asr #3
254 asr x10,x5,#2
287 cmp x8,x5,asr #3
306 mov x5,x22
310 // x5 has the value of bet
[all...] |
| ihevc_intra_pred_luma_mode_3_to_9.s | 120 add x7, x7, x5, lsl #2 //gai4_ihevc_ang_table[mode]
141 sub x7, x5, #3
292 mov x5,x2
328 st1 {v24.8b},[x5], x3 //st (row 4)
350 st1 {v22.8b},[x5], x3 //(from previous loop)st (row 5)
367 st1 {v20.8b},[x5], x3 //(from previous loop)st (row 6)
379 st1 {v18.8b},[x5], x3 //(from previous loop)st (row 7)
390 add x5,x2,x3,lsl#2
457 st1 {v24.8b},[x5], x3 //st (row 4)
463 st1 {v24.8b},[x5], x3 //(from previous loop)st (row 5
[all...] |
| ihevc_intra_pred_chroma_mode_18_34.s | 119 cmp x5,#0x22
167 cmp x5,#0x22
|
| /prebuilts/go/darwin-x86/src/syscall/ |
| zerrors_linux_arm64.go | 13 AF_APPLETALK = 0x5
64 ARPHRD_CHAOS = 0x5
126 B150 = 0x5
164 BPF_JMP = 0x5
248 ENCODING_MANCHESTER = 0x5
337 ETH_P_SNAP = 0x5
358 F_GETLK = 0x5
359 F_GETLK64 = 0x5
534 IPV6_2292RTHDR = 0x5
620 IP_ROUTER_ALERT = 0x5
[all...] |
| /prebuilts/go/linux-x86/src/syscall/ |
| zerrors_linux_arm64.go | 13 AF_APPLETALK = 0x5
64 ARPHRD_CHAOS = 0x5
126 B150 = 0x5
164 BPF_JMP = 0x5
248 ENCODING_MANCHESTER = 0x5
337 ETH_P_SNAP = 0x5
358 F_GETLK = 0x5
359 F_GETLK64 = 0x5
534 IPV6_2292RTHDR = 0x5
620 IP_ROUTER_ALERT = 0x5
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
| vector2.d | 339 52c: 81 c6 d8 01 R0 = R0 >>> 0x5 \(V\);
340 530: 81 c6 d9 01 R0 = R1 >>> 0x5 \(V\);
341 534: 81 c6 db 05 R2 = R3 >>> 0x5 \(V\);
342 538: 81 c6 dd 09 R4 = R5 >>> 0x5 \(V\);
343 53c: 81 c6 df 0d R6 = R7 >>> 0x5 \(V\);
344 540: 81 c6 d8 03 R1 = R0 >>> 0x5 \(V\);
345 544: 81 c6 da 07 R3 = R2 >>> 0x5 \(V\);
346 548: 81 c6 dc 0b R5 = R4 >>> 0x5 \(V\);
347 54c: 81 c6 de 0f R7 = R6 >>> 0x5 \(V\);
348 550: 81 c6 29 40 R0 = R1 << 0x5 \(V, S\)
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/bl32/tsp/aarch64/ |
| tsp_exceptions.S | 25 stp x4, x5, [sp, #0x20]
38 ldp x4, x5, [sp, #0x20]
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch64/ |
| fvp_helpers.S | 210 mov x5, #FVP_MAX_CPUS_PER_CLUSTER
211 madd x0, x2, x5, x0
|
| /external/elfutils/tests/ |
| testfile-macros-0xff.s | 51 .byte 0x5
136 .byte 0x5
|
| /external/libavc/encoder/ |
| iv2.h | 109 IV_IP_FRAME = 0x5,
141 IV_INTERLACED_BOTTOMFIELD = 0x5,
|
| /external/libmpeg2/common/armv8/ |
| impeg2_idct.s | 135 ////x5: pred_strd
143 ld1 {v0.8b}, [x2], x5
146 ld1 {v1.8b}, [x2], x5
149 ld1 {v2.8b}, [x2], x5
156 ld1 {v3.8b}, [x2], x5
159 ld1 {v4.8b}, [x2], x5
162 ld1 {v5.8b}, [x2], x5
165 ld1 {v6.8b}, [x2], x5
169 ld1 {v7.8b}, [x2], x5
239 ld1 {v30.8b}, [x2], x5
[all...] |
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| convolve_ssse3.h | 96 // compensate the subtracted 64 in f[2]. x5 is always non negative.
97 const __m128i x5 = _mm_maddubs_epi16(s[2], _mm_set1_epi8(64)); local
105 temp = _mm_adds_epi16(temp, x5);
|
| /external/llvm/test/MC/AArch64/ |
| arm64-simd-ldst.s | [all...] |
| /external/llvm/test/MC/Hexagon/ |
| elf-flags.s | 8 # CHECK-V55: Flags: 0x5
|
| /external/llvm/test/MC/Mips/ |
| module-hardfloat.s | 12 # CHECK-OBJ: FP ABI: Hard float (32-bit CPU, Any FPU) (0x5)
|
| /external/llvm/unittests/Support/ |
| ErrorOrTest.cpp | 100 ErrorOr<CastsToErrorCode> x5(errc::no_such_file_or_directory);
108 EXPECT_FALSE(x5);
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_reg.h | 43 #define PRIM3D_LINELIST (0x5<<18)
346 #define TEXCOORDFMT_4D_16 0x5
496 #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16))
553 #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| intel_reg.h | 87 #define TEXCOORDFMT_4D_16 0x5
208 #define PRIM3D_LINELIST (0x5<<18)
|
| /external/syslinux/gpxe/src/drivers/net/ |
| myri10ge_mcp.h | 342 #define MXGEFW_RSS_HASH_TYPE_SRC_DST_PORT 0x5
343 #define MXGEFW_RSS_HASH_TYPE_MAX 0x5
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-arm64-linux.S | 196 ldp x4, x5, [x1, #0] // x4 = .guest, x5 = .host
202 br x5
|
| /external/vixl/test/ |
| test-api.cc | 52 {false, false, 1, UINT32_C(0x4)}, {false, false, 1, UINT32_C(0x5)},
61 {false, false, 2, UINT32_C(0x4)}, {false, false, 2, UINT32_C(0x5)},
|
| /hardware/intel/img/psb_video/src/hwdefs/ |
| dma_api.h | 466 DMA_ACC_DEL_1280 = 0x5, //!< Access delay 1280 clock cycles
492 DMA_BURST_5 = 0x5, //!< burst size of 5
|
