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  /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Protocol/
LegacyBiosPlatform.h 328 /// This mode returns the Compatibility16 policy for the device that should be the ISA bus
335 /// HandleBuffer Buffer of all ISA bus handles found.
337 /// HandleCount Number of ISA bus handles found.
352 /// HandleCount Number of USB bus handles found.
472 /// PCI interrupt router bus.
474 UINT8 Bus;
519 /// PCI bus of the entry.
521 UINT8 Bus;
681 @param PciBus The PCI bus number for this device.
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Usb/UsbBusDxe/
UsbUtility.h 42 @param UsbBus The usb bus driver.
60 @param UsbBus The USB bus driver.
76 @param UsbBus The USB bus driver.
92 @param UsbBus The USB bus driver.
110 @param UsbBus The USB bus driver.
128 @param UsbBus The USB bus driver.
146 @param UsbBus The USB bus driver.
180 @param UsbBus The USB bus driver.
218 @param UsbBus The USB bus driver.
256 @param UsbBus The USB bus driver.
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  /device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/
AcpiSmmPlatform.h 65 #define PCI_DEVICE(Bus, Dev, Func) \
66 Bus, Dev, Func
  /external/libbrillo/brillo/dbus/
dbus_signal_handler_unittest.cc 32 dbus::Bus::Options options;
33 options.bus_type = dbus::Bus::SYSTEM;
exported_property_set.h 50 // It is used as part of DBusObject to implement D-Bus object properties on
97 explicit ExportedPropertySet(dbus::Bus* bus);
101 // D-Bus object has been exported successfully and property notification
114 // D-Bus methods for org.freedesktop.DBus.Properties interface.
144 dbus::Bus* bus_; // weak; owned by outer DBusObject containing this object.
149 // D-Bus callbacks may last longer the property set exporting those methods.
dbus_object.h 6 // D-Bus objects in C++. It provides an easy way to define interfaces with
8 // all of its interfaces, to marshal method calls (by converting D-Bus method
16 const scoped_refptr<dbus::Bus>& bus)
17 : dbus_object_(object_manager, bus,
33 // exposing them to D-Bus clients.
77 #include <dbus/bus.h>
89 // This is an implementation proxy class for a D-Bus interface of an object.
90 // The important functionality for the users is the ability to add D-Bus method
91 // handlers and define D-Bus object properties. This is achieved by using on
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dbus_object.cc 34 dbus::Bus* /* bus */,
38 VLOG(1) << "Registering D-Bus interface '" << interface_name_ << "' for '"
70 dbus::Bus* /* bus */,
73 VLOG(1) << "Registering D-Bus interface '" << interface_name_ << "' for '"
153 const scoped_refptr<dbus::Bus>& bus,
155 : property_set_(bus.get()), bus_(bus), object_path_(object_path)
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  /external/syslinux/efi32/include/efi/
pci22.h 119 UINT8 Bus;
127 UINT32 Bus : 8;
  /external/syslinux/efi64/include/efi/
pci22.h 119 UINT8 Bus;
127 UINT32 Bus : 8;
  /external/syslinux/gnu-efi/gnu-efi-3.0/inc/
pci22.h 119 UINT8 Bus;
127 UINT32 Bus : 8;
  /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/
PciOptionRomSupport.c 18 PCI Bus Driver
53 UINT8 Bus;
58 Bus = PciIoDevice->BusNumber;
87 Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);
123 DEBUG ((EFI_D_ERROR, "PCIBUS: GetOpRomInfo: B-%x, D-%x, F-%x\n", (UINTN)Bus, (UINTN)Device, (UINTN)Function));
  /device/linaro/bootloader/edk2/QuarkPlatformPkg/Pci/Dxe/PciPlatform/
PciPlatform.h 45 UINTN Bus;
  /external/valgrind/gdbserver_tests/
mcsignopass.stdoutB.exp 4 SIGBUS Yes Yes Yes Bus error
55 Program received signal SIGBUS, Bus error.
  /system/tpm/attestation/server/
dbus_service.h 24 #include <dbus/bus.h>
33 // Handles D-Bus calls to the attestation daemon.
38 DBusService(const scoped_refptr<dbus::Bus>& bus,
42 // Connects to D-Bus system bus and exports methods.
51 // Handles a CreateGoogleAttestedKey D-Bus call.
57 // Handles a GetKeyInfo D-Bus call.
62 // Handles a GetEndorsementInfo D-Bus call.
68 // Handles a GetAttestationKeyInfo D-Bus call
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  /system/update_engine/update_manager/
state_factory.cc 55 scoped_refptr<dbus::Bus> bus = local
59 std::make_unique<org::chromium::SessionManagerInterfaceProxy>(bus),
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/
LegacyBbs.c 178 BbsTable[0].Bus = 0xff;
206 BbsTable[BbsIndex + Index].Bus = HddInfo[HddIndex].Bus;
335 // PCI bus driver enumerate all subsequent handles
  /device/linaro/bootloader/edk2/MdePkg/Include/Library/
PciSegmentLib.h 6 address parameter that encodes the PCI Segment, PCI Bus, PCI Device, PCI Function, and PCI Register.
12 PCI Bus Bits 20..27
17 | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
42 Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
46 The unused upper bits of Segment, Bus, Device, Function,
50 @param Bus PCI Bus number. Range 0..255.
58 #define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
63 (((Bus) & 0xff) << 20) | \
69 (((Bus) & 0xff) << 20) \
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  /system/tpm/attestation/client/
dbus_proxy.cc 42 dbus::Bus::Options options;
43 options.bus_type = dbus::Bus::SYSTEM;
44 bus_ = new dbus::Bus(options);
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/
PciRootBridgeIo.c 87 DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base, Bridge->Bus.Limit));
173 CopyMem (&RootBridge->Bus, &Bridge->Bus, sizeof (PCI_ROOT_BRIDGE_APERTURE));
183 Aperture = &RootBridge->Bus;
374 if (PciRbAddr->Bus < RootBridge->Bus.Base ||
375 PciRbAddr->Bus > RootBridge->Bus.Limit) {
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  /device/linaro/bootloader/edk2/SecurityPkg/Tcg/Opal/OpalPasswordSmm/
OpalAhciMode.c 409 @param DataPhysicalAddr The pointer to the Data Buffer pci bus master address.
982 @param[in] Bus The bus number of ata host controller.
992 IN UINTN Bus,
1000 OldBar = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x24));
1004 PciAnd32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x04), (UINT32)~BIT1);
1009 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x24), 0xFFFFFFFF);
1010 Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x24));
1016 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x24), OldBar);
1020 PciOr32 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x04), BIT1);
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  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/
PciEnumeratorSupport.c 2 PCI emumeration support functions implementation for PCI Bus module.
25 @param Bus PCI bus NO.
37 IN UINT8 Bus,
46 // Create PCI address map in terms of Bus, Device and Func
48 Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0);
86 @param StartBusNumber Bus number of begining.
157 // If it is PPB, we need to get the secondary bus to continue the enumeration
168 // Ensure secondary bus number is greater than the primary bus number to avoid
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  /device/linaro/bootloader/OpenPlatformPkg/Applications/EepromCmd/
EepromCmd.c 56 #define I2C_DEVICE_INDEX(bus, address) (((address) & 0xffff) | (bus) << 16)
95 "eeprom [read] [write] [list] [<Chip>] [<Bus>][<Address>] [<Length>] [-d <Data>] [-m <Source>]\n"
101 "Chip - EEPROM bus address\n"
102 "Bus - I2C bus address\n"
151 Print (L"0x%x at bus %d\n", I2C_DEVICE_ADDRESS(EepromProtocol->Identifier),
217 UINTN Address, Length, Chip, Source, Bus;
294 Bus = ShellHexStrToUintn (ValueStr);
311 EepromLocateProtocol (I2C_DEVICE_INDEX(Bus, Chip), &Handle, &EepromProtocol);
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  /device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/
XenSupport.c 2 Scan the entire PCI bus for root bridges to support OVMF above Xen.
62 IN UINTN Bus,
88 PCI_LIB_ADDRESS (Bus, Device, Function, Offset),
143 PCI_LIB_ADDRESS (Bus, Device, Function, Offset),
198 // After scanning all the PCI devices on the PCI root bridge's primary bus,
199 // update the Primary Bus Number for the next PCI root bridge to be this PCI
200 // root bridge's subordinate bus number + 1.
208 // Scan all the PCI devices on the primary bus of the PCI root bridge
244 // Increment the number of PCI device found on the primary bus of the
265 // Get the Bus range that the PPB is decoding
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  /device/linaro/bootloader/edk2/OvmfPkg/PciHotPlugInitDxe/
PciHotPlugInit.c 2 This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL, providing the PCI bus
43 // edk2 PCI Bus UEFI_DRIVER.
126 This procedure returns a list of root HPCs. The PCI bus driver must
127 initialize these controllers during the boot process. The PCI bus driver may
131 any of its parent buses. Only one HPC can control a PCI bus. Because this
134 The PCI bus driver may not check for such invalid conditions. The callee
177 connected to the bus. All the necessary registers in the HPC are set up. For
186 @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
231 Returns the resource padding that is required by the PCI bus that is
234 This function returns the resource padding that is required by the PCI bus
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  /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/
Pci.h 35 #define CALC_EFI_PCI_ADDRESS(Bus, Dev, Func, Reg) \
36 ((UINT64) ((((UINTN) Bus) << 24) + (((UINTN) Dev) << 16) + (((UINTN) Func) << 8) + ((UINTN) Reg)))
38 #define CALC_EFI_PCIEX_ADDRESS(Bus, Dev, Func, ExReg) ( \
39 (UINT64) ((((UINTN) Bus) << 24) + (((UINTN) Dev) << 16) + (((UINTN) Func) << 8) + (LShiftU64 ((UINT64) ExReg, 32))) \
367 UINT8 PrimaryBus; // Primary Bus Number
368 UINT8 SecondaryBus; // Secondary Bus Number
369 UINT8 SubordinateBus; // Subordinate Bus Number
401 UINT8 PciBusNumber; // PCI Bus Number
402 UINT8 CardBusBusNumber; // CardBus Bus Number
403 UINT8 SubordinateBusNumber; // Subordinate Bus Number
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