| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 162 MemOperand MemoryOperand(size_t* first_index) {
177 return MemOperand(InputRegister(index + 0), InputRegister(index + 1),
181 return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
184 return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
187 return MemOperand(no_reg);
190 MemOperand MemoryOperand(size_t first_index = 0) {
242 MemOperand ToMemOperand(InstructionOperand* op, MacroAssembler* masm) const {
248 MemOperand SlotToMemOperand(int slot, MacroAssembler* masm) const {
258 return MemOperand(offset.from_stack_pointer() ? masm->StackPointer() : fp,
438 __ Ldr(result, MemOperand(buffer, offset, UXTW));
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| /external/v8/src/full-codegen/arm/ |
| full-codegen-arm.cc | 118 __ ldr(r2, MemOperand(sp, receiver_offset));
224 __ str(r0, MemOperand(fp, StandardFrameConstants::kContextOffset));
235 __ ldr(r0, MemOperand(fp, parameter_offset));
237 MemOperand target = ContextMemOperand(cp, var->index());
271 __ ldr(r1, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
467 __ ldr(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
563 __ str(reg, MemOperand(sp, 0));
662 MemOperand FullCodeGenerator::StackOperand(Variable* var) {
672 return MemOperand(fp, offset);
676 MemOperand FullCodeGenerator::VarOperand(Variable* var, Register scratch)
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| /external/vixl/src/aarch32/ |
| operands-aarch32.h | 624 // MemOperand represents the addressing mode of a load or store instruction.
626 // Usage: <instr> <Rt> , <MemOperand>
630 // <MemOperand> is the rest of the arguments to the instruction
632 // <MemOperand> can be in one of 3 addressing modes:
659 class MemOperand {
663 explicit MemOperand(Register rn, AddrMode addrmode = Offset)
680 MemOperand(Register rn, int32_t offset, AddrMode addrmode = Offset)
690 MemOperand(Register rn, Sign sign, int32_t offset, AddrMode addrmode = Offset)
707 MemOperand(Register rn, Sign sign, Register rm, AddrMode addrmode = Offset)
721 MemOperand(Register rn, Register rm, AddrMode addrmode = Offset
[all...] |
| assembler-aarch32.h | 296 const MemOperand& operand);
300 const MemOperand& operand);
313 const MemOperand& operand);
333 const MemOperand& operand);
360 const MemOperand& operand);
491 const MemOperand& operand);
509 const MemOperand& operand);
517 const MemOperand& operand);
[all...] |
| disasm-aarch32.h | 225 const MemOperand& operand_;
228 PrintMemOperand(LocationType location_type, const MemOperand& operand)
231 const MemOperand& GetOperand() const { return operand_; }
462 virtual DisassemblerStream& operator<<(const MemOperand& operand) {
770 void lda(Condition cond, Register rt, const MemOperand& operand);
772 void ldab(Condition cond, Register rt, const MemOperand& operand);
774 void ldaex(Condition cond, Register rt, const MemOperand& operand);
776 void ldaexb(Condition cond, Register rt, const MemOperand& operand);
781 const MemOperand& operand);
783 void ldaexh(Condition cond, Register rt, const MemOperand& operand)
[all...] |
| macro-assembler-aarch32.cc | 250 MemOperand MacroAssembler::MemOperandComputationHelper(
262 if ((offset & extra_offset_mask) == offset) return MemOperand(base, offset);
298 if (add_offset == 0) return MemOperand(scratch, load_store_offset);
308 return MemOperand(scratch, load_store_offset);
[all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.cc | 45 const MemOperand& src,
65 const MemOperand& dst,
87 ld(destination, MemOperand(s6, index << kPointerSizeLog2));
96 ld(destination, MemOperand(s6, index << kPointerSizeLog2));
103 sd(source, MemOperand(s6, index << kPointerSizeLog2));
113 sd(source, MemOperand(s6, index << kPointerSizeLog2));
184 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
185 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
189 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
194 return MemOperand(sp, doubles_size + register_offset)
[all...] |
| /external/v8/src/arm64/ |
| code-stubs-arm64.cc | 29 __ Str(x1, MemOperand(jssp, x5));
86 __ Ldr(double_scratch, MemOperand(input, double_offset));
92 __ Ldr(result, MemOperand(input, double_offset));
[all...] |
| assembler-arm64-inl.h | 445 MemOperand::MemOperand()
451 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode)
458 MemOperand::MemOperand(Register base,
473 MemOperand::MemOperand(Register base,
485 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode
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| /external/v8/src/builtins/arm64/ |
| builtins-arm64.cc | 232 __ Ldr(x0, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
278 __ Ldr(x2, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
355 __ Ldr(x0, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
429 __ Ldr(x2, MemOperand(jssp, x0, LSL, kPointerSizeLog2));
622 __ Ldp(x10, x11, MemOperand(x4, -2 * kPointerSize, PreIndex));
651 __ Ldr(cp, MemOperand(fp, ConstructFrameConstants::kContextOffset));
724 __ Ldr(x0, MemOperand(fp, ConstructFrameConstants::kLengthOffset));
730 __ Ldr(x3, MemOperand(x3, x0, LSL, kPointerSizeLog2));
790 __ Ldrsb(x10, MemOperand(x10));
797 __ Ldr(x10, MemOperand(x10))
[all...] |
| /external/v8/src/crankshaft/s390/ |
| lithium-codegen-s390.cc | 88 MemOperand(sp, count * kDoubleSize));
103 MemOperand(sp, count * kDoubleSize));
144 __ lay(sp, MemOperand(sp, -(slots * kPointerSize)));
151 __ StoreP(r3, MemOperand(sp, r2, kPointerSize));
152 __ lay(r2, MemOperand(r2, -kPointerSize));
201 __ StoreP(r2, MemOperand(fp, StandardFrameConstants::kContextOffset));
212 __ LoadP(r2, MemOperand(fp, parameter_offset));
214 MemOperand target = ContextMemOperand(cp, var->index());
245 __ lay(sp, MemOperand(sp, -slots * kPointerSize));
506 MemOperand LCodeGen::ToMemOperand(LOperand* op) const
[all...] |
| lithium-codegen-s390.h | 76 MemOperand ToMemOperand(LOperand* op) const;
77 // Returns a MemOperand pointing to the high word of a DoubleStackSlot.
78 MemOperand ToHighMemOperand(LOperand* op) const;
116 MemOperand PrepareKeyedOperand(Register key, Register base,
223 MemOperand BuildSeqStringOperand(Register string, LOperand* index,
|
| /external/v8/src/mips/ |
| assembler-mips.h | 352 // Class MemOperand represents a memory operand in load and store instructions.
353 class MemOperand : public Operand {
361 explicit MemOperand(Register rn, int32_t offset = 0);
362 explicit MemOperand(Register rn, int32_t unit, int32_t multiplier,
769 void lb(Register rd, const MemOperand& rs);
770 void lbu(Register rd, const MemOperand& rs);
771 void lh(Register rd, const MemOperand& rs);
772 void lhu(Register rd, const MemOperand& rs);
773 void lw(Register rd, const MemOperand& rs);
774 void lwl(Register rd, const MemOperand& rs)
[all...] |
| /external/v8/src/debug/arm/ |
| debug-arm.cc | 60 patcher.masm()->ldr(ip, MemOperand(v8::internal::pc, 0));
131 __ ldr(r1, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
|
| /external/v8/src/crankshaft/arm/ |
| lithium-codegen-arm.h | 77 MemOperand ToMemOperand(LOperand* op) const;
78 // Returns a MemOperand pointing to the high word of a DoubleStackSlot.
79 MemOperand ToHighMemOperand(LOperand* op) const;
121 MemOperand PrepareKeyedOperand(Register key,
250 MemOperand BuildSeqStringOperand(Register string,
|
| lithium-gap-resolver-arm.cc | 215 MemOperand source_operand = cgen_->ToMemOperand(source);
220 MemOperand destination_operand = cgen_->ToMemOperand(destination);
273 MemOperand source_operand = cgen_->ToMemOperand(source);
278 MemOperand destination_operand = cgen_->ToMemOperand(destination);
|
| /external/v8/src/crankshaft/ppc/ |
| lithium-codegen-ppc.h | 77 MemOperand ToMemOperand(LOperand* op) const;
78 // Returns a MemOperand pointing to the high word of a DoubleStackSlot.
79 MemOperand ToHighMemOperand(LOperand* op) const;
117 MemOperand PrepareKeyedOperand(Register key, Register base,
223 MemOperand BuildSeqStringOperand(Register string, LOperand* index,
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 121 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
126 int MemOperand, const MCInst &MI,
129 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
160 /// memory operand. Op specifies the operand # of the memoperand.
387 int MemOperand, const MCInst &MI,
593 EmitSegmentOverridePrefix(TSFlags, CurByte, MemOperand, MI, OS);
716 unsigned &CurByte, int MemOperand,
723 if (MemOperand != -1) { // If the instruction has a memory operand.
724 switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) {
747 /// MemOperand is the operand # of the start of a memory operand if present. I
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| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | 948 const MemOperand& src) {
955 const MemOperand& dst) {
962 const MemOperand& src) {
970 const MemOperand& addr,
999 const MemOperand& src) {
1006 const MemOperand& dst) {
1013 const MemOperand& addr,
1030 const MemOperand& src,
1039 const MemOperand& dst,
1048 const MemOperand& src
[all...] |
| operands-aarch64.h | 814 // MemOperand represents the addressing mode of a load or store instruction.
815 class MemOperand {
817 // Creates an invalid `MemOperand`.
818 MemOperand();
819 explicit MemOperand(Register base,
822 MemOperand(Register base,
826 MemOperand(Register base,
830 MemOperand(Register base, const Operand& offset, AddrMode addrmode = Offset);
876 bool Equals(const MemOperand& other) const {
899 GenericOperand(const MemOperand& mem_op
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm64.cc | 62 ALWAYS_INLINE inline MemOperand AbsoluteHeapOperandFrom(Location location, size_t offset = 0) {
63 return MemOperand(XRegisterFrom(location), offset);
186 __ Ldr(tmp_reg, MemOperand(src_curr_addr, element_size, PostIndex));
213 __ Str(tmp_reg, MemOperand(dst_curr_addr, element_size, PostIndex));
[all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | 560 // Class MemOperand represents a memory operand in load and store instructions
561 class MemOperand BASE_EMBEDDED {
568 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
573 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
578 explicit MemOperand(Register rn, Register rm,
580 INLINE(static MemOperand PointerAddressFromSmiKey(Register array,
584 return MemOperand(array, key, LSL, kPointerSizeLog2 - kSmiTagSize, am);
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 57 /// a 16-bit memory operand. Op specifies the operand # of the memoperand.
134 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
141 bool emitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
146 int MemOperand, const MCInstrDesc &Desc) const;
204 /// a 32-bit memory operand. Op specifies the operand # of the memoperand.
222 /// a 64-bit memory operand. Op specifies the operand # of the memoperand.
597 int MemOperand, const MCInst &MI,
720 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);
722 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
766 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg)
[all...] |
| /external/v8/src/compiler/ppc/ |
| code-generator-ppc.cc | 84 MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) {
92 return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
95 return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
98 return MemOperand(r0);
101 MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) {
105 MemOperand ToMemOperand(InstructionOperand* op) const {
111 MemOperand SlotToMemOperand(int slot) const {
113 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
565 MemOperand operand = i.MemoryOperand(&mode); \
579 MemOperand operand = i.MemoryOperand(&mode);
[all...] |
| /art/compiler/linker/arm64/ |
| relative_patcher_arm64.cc | 368 vixl::aarch64::MemOperand& lock_word,
396 using vixl::aarch64::MemOperand;
405 __ Ldr(entrypoint, MemOperand(tr, entry_point_offset));
434 MemOperand lock_word(holder_reg, mirror::Object::MonitorOffset().Int32Value());
437 MemOperand ldr_address(lr, BAKER_MARK_INTROSPECTION_FIELD_LDR_OFFSET);
441 __ Ldr(ip0.W(), MemOperand(base_reg, ip0, LSL, 2)); // Load the reference.
448 __ Ldr(ip0, MemOperand(/* Thread* */ vixl::aarch64::x19, offset));
463 MemOperand lock_word(base_reg, mirror::Object::MonitorOffset().Int32Value() - data_offset);
467 MemOperand ldr_address(lr, BAKER_MARK_INTROSPECTION_ARRAY_LDR_OFFSET);
490 MemOperand lock_word(root_reg.X(), mirror::Object::MonitorOffset().Int32Value())
[all...] |
