| /external/v8/src/ia32/ |
| assembler-ia32.cc | 220 // Implementation of Operand
222 Operand::Operand(Register base, int32_t disp, RelocInfo::Mode rmode) {
242 Operand::Operand(Register base,
267 Operand::Operand(Register index,
279 bool Operand::is_reg(Register reg) const {
285 bool Operand::is_reg_only() const {
290 Register Operand::reg() const
[all...] |
| macro-assembler-ia32.h | 34 typedef Operand MemOperand;
60 void Load(Register dst, const Operand& src, Representation r);
61 void Store(Register src, const Operand& dst, Representation r);
71 void Set(const Operand& dst, int32_t x) { mov(dst, Immediate(x)); }
80 void CompareRoot(const Operand& with, Heap::RootListIndex index);
89 void JumpIfRoot(const Operand& with, Heap::RootListIndex index,
103 void JumpIfNotRoot(const Operand& with, Heap::RootListIndex index,
182 // Operand(reg, off).
359 void Cvtsi2sd(XMMRegister dst, Register src) { Cvtsi2sd(dst, Operand(src)); }
360 void Cvtsi2sd(XMMRegister dst, const Operand& src)
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceOperand.h | 11 /// \brief Declares the Operand class and its target-independent subclasses.
36 class Operand {
37 Operand() = delete;
38 Operand(const Operand &) = delete;
39 Operand &operator=(const Operand &) = delete;
59 // Target-specific operand classes use kTarget as the starting point for
71 /// Every Operand keeps an array of the Variables referenced in the operand
[all...] |
| IceTargetLoweringARM32.h | 167 Operand *loOperand(Operand *Operand);
168 Operand *hiOperand(Operand *Operand);
186 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
187 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default
[all...] |
| /device/linaro/bootloader/edk2/BaseTools/Source/Python/Common/ |
| RangeExpression.py | 31 WRN_BOOL_EXPR = 'Operand of boolean type cannot be used in arithmetic expression.'
32 WRN_EQCMP_STR_OTHERS = '== Comparison between Operand of string type and Boolean/Number Type always return False.'
33 WRN_NECMP_STR_OTHERS = '!= Comparison between Operand of string type and Boolean/Number Type always return True.'
34 ERR_RELCMP_STR_OTHERS = 'Operator taking Operand of string type and Boolean/Number Type is not allowed: [%s].'
106 def Calculate(self, Operand, DataType, SymbolTable):
107 if type(Operand) == type('') and not Operand.isalnum():
112 rangeContainer.push(RangeObject(0, int(Operand) - 1))
113 rangeContainer.push(RangeObject(int(Operand) + 1, MaxOfType(DataType)))
120 def Calculate(self, Operand, DataType, SymbolTable):
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
| unwind-bad.l | 2 .*:8: Error: First operand to \.save\.g must be a positive 4-bit constant
3 .*:10: Error: First operand to \.save\.g must be a positive 4-bit constant
4 .*:12: Error: First operand to \.save\.g must be a positive 4-bit constant
7 .*:20: Error: Operand to \.save\.f must be a positive 20-bit constant
8 .*:22: Error: Operand to \.save\.f must be a positive 20-bit constant
9 .*:24: Error: Operand to \.save\.f must be a positive 20-bit constant
12 .*:32: Error: First operand to \.save\.b must be a positive 5-bit constant
13 .*:34: Error: First operand to \.save\.b must be a positive 5-bit constant
14 .*:36: Error: First operand to \.save\.b must be a positive 5-bit constant
17 .*:44: Error: Operand 2 to \.spillreg must be a writable registe
[all...] |
| /external/v8/src/s390/ |
| macro-assembler-s390.cc | 49 mov(ip, Operand(target, rmode));
121 mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode));
155 AddP(sp, Operand(total));
161 ShiftLeftP(scratch, count, Operand(kPointerSizeLog2));
168 mov(r0, Operand(handle));
173 mov(dst, Operand(value));
192 SubP(location, location, Operand(stack_offset));
210 AddP(location, location, Operand(stack_offset));
217 SubP(location, location, Operand(stack_offset));
237 AddP(location, location, Operand(stack_offset))
[all...] |
| assembler-s390.cc | 265 // Implementation of Operand and MemOperand
268 Operand::Operand(Handle<Object> handle) {
537 llilf(r1, Operand(constant));
544 brc(c, Operand(offset_in_halfwords)); // short jump
546 brcl(c, Operand(offset_in_halfwords)); // long jump
593 oill(r3, Operand::Zero());
608 void Assembler::name(Register r, const Operand& i2) { ri_form(op, r, i2); }
610 void Assembler::ri_form(Opcode op, Register r1, const Operand& i2) {
623 void Assembler::name(Condition m, const Operand& i2) { ri_form(op, m, i2);
[all...] |
| codegen-s390.cc | 82 __ mov(r0, Operand(kIsIndirectStringMask));
89 __ nilf(ip, Operand(kStringRepresentationMask));
90 __ CmpP(ip, Operand(kConsStringTag));
92 __ CmpP(ip, Operand(kThinStringTag));
126 __ mov(r0, Operand(kStringRepresentationMask));
132 __ AddP(string, Operand(SeqTwoByteString::kHeaderSize - kHeapObjectTag));
140 __ mov(r0, Operand(kIsIndirectStringMask));
146 __ mov(r0, Operand(kShortExternalStringMask));
155 __ mov(r0, Operand(kStringEncodingMask));
159 __ ShiftLeftP(result, index, Operand(1))
[all...] |
| /prebuilts/ndk/r16/sources/third_party/shaderc/third_party/spirv-tools/source/opt/ |
| instruction.h | 23 #include "operand.h"
34 // About operand:
36 // In the SPIR-V specification, the term "operand" is used to mean any single
38 // "operand" is used to mean a *logical* operand. A logical operand may consist
40 // example, a logical operand of a 64-bit integer needs two words to express.
49 // A *logical* operand to a SPIR-V instruction. It can be the type id, result
51 struct Operand {
52 Operand(spv_operand_type_t t, std::vector<uint32_t>&& w
[all...] |
| /external/v8/src/builtins/arm/ |
| builtins-arm.cc | 40 __ add(r0, r0, Operand(num_extra_args + 1));
146 __ sub(r4, r4, Operand(1), SetCC);
201 __ cmp(ip, Operand(0x80000000));
219 __ add(r0, r0, Operand(1));
240 __ sub(r0, r0, Operand(1), SetCC);
286 __ sub(r0, r0, Operand(1), SetCC);
362 __ sub(r0, r0, Operand(1), SetCC);
433 __ sub(r0, r0, Operand(1), SetCC);
498 __ add(r2, r2, Operand(Code::kHeaderSize - kHeapObjectTag));
529 __ add(r2, r2, Operand(Code::kHeaderSize - kHeapObjectTag))
[all...] |
| /external/v8/src/crankshaft/arm/ |
| lithium-codegen-arm.cc | 127 __ sub(sp, sp, Operand(slots * kPointerSize));
130 __ add(r0, sp, Operand(slots * kPointerSize));
131 __ mov(r1, Operand(kSlotsZapValue));
134 __ sub(r0, r0, Operand(kPointerSize));
141 __ sub(sp, sp, Operand(slots * kPointerSize));
173 Operand(slots));
238 __ sub(sp, sp, Operand(slots * kPointerSize));
273 __ mov(scratch0(), Operand(StackFrame::TypeToMarker(StackFrame::STUB)));
329 __ mov(entry_offset, Operand(entry - base));
347 __ mov(ip, Operand(StackFrame::TypeToMarker(StackFrame::STUB)))
1807 MemOperand operand = BuildSeqStringOperand(string, instr->index(), encoding); local
1831 MemOperand operand = BuildSeqStringOperand(string, instr->index(), encoding); local
2621 MemOperand operand = MemOperand(object, offset); local
2637 MemOperand operand = FieldMemOperand(object, offset); local
2732 Operand operand = key_is_constant local
2735 __ add(scratch0(), external_pointer, operand); local
3696 MemOperand operand = MemOperand(object, offset); local
3734 MemOperand operand = FieldMemOperand(object, offset); local
3750 MemOperand operand = FieldMemOperand(scratch, offset); local
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVVMReflect.cpp | 145 // ConstantDataSequential operand which can be converted to string and used
153 // In this case, we get a Constant with a GlobalVariable operand and we need
183 const Value *Operand = cast<Constant>(Sym)->getOperand(0);
184 if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Operand)) {
185 // For CUDA-7.0 style __nvvm_reflect calls, we need to find the operand's
190 Operand = Initializer;
193 assert(isa<ConstantDataSequential>(Operand) &&
195 assert(cast<ConstantDataSequential>(Operand)->isCString() &&
198 StringRef ReflectArg = cast<ConstantDataSequential>(Operand)->getAsString();
|
| /frameworks/compile/mclinker/lib/Script/ |
| UnaryOp.cpp | 13 #include "mcld/Script/Operand.h"
75 case Operand::SECTION:
78 case Operand::SECTION_DESC:
97 case Operand::SECTION:
100 case Operand::SECTION_DESC:
168 case Operand::SECTION:
171 case Operand::SECTION_DESC:
|
| /frameworks/compile/mclinker/include/mcld/Script/ |
| UnaryOp.h | 20 class Operand;
39 void appendOperand(Operand* pOperand) { m_pOperand = pOperand; }
42 Operand* m_pOperand;
|
| /external/v8/src/arm/ |
| deoptimizer-arm.cc | 133 __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
142 __ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
156 __ add(r4, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
162 __ mov(r0, Operand(0));
168 __ mov(r1, Operand(type())); // bailout type,
172 __ mov(r5, Operand(ExternalReference::isolate_address(isolate())));
205 __ add(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
215 __ add(r3, r1, Operand(FrameDescription::frame_content_offset()));
222 __ add(r3, r3, Operand(sizeof(uint32_t)));
248 __ add(r1, r4, Operand(r1, LSL, 2))
[all...] |
| /frameworks/ml/nn/runtime/ |
| ModelBuilder.h | 38 // Adds an operand to the model.
69 const Operand& getInputOperand(uint32_t i) const {
73 const Operand& getOutputOperand(uint32_t i) const {
76 const Operand& getOperand(uint32_t index) const { return mOperands[index]; }
111 std::vector<Operand> mOperands;
128 // Operand index and buffer pointer for all the large operand values of this model.
|
| /hardware/qcom/neuralnetworks/hvxservice/1.0/ |
| HexagonOperations.h | 36 using ::android::hardware::neuralnetworks::V1_0::Operand;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/ |
| BaseLibInternals.h | 48 This function shifts the 64-bit value Operand to the left by Count bits. The
51 @param Operand The 64-bit operand to shift left.
54 @return Operand << Count
60 IN UINT64 Operand,
68 This function shifts the 64-bit value Operand to the right by Count bits. The
71 @param Operand The 64-bit operand to shift right.
74 @return Operand >> Count
80 IN UINT64 Operand,
[all...] |
| /external/v8/src/builtins/ppc/ |
| builtins-ppc.cc | 40 __ addi(r3, r3, Operand(num_extra_args + 1));
143 __ addi(r7, r3, Operand(1));
150 __ subi(r7, r7, Operand(1));
151 __ cmpi(r7, Operand::Zero());
155 __ ShiftLeftImm(r5, r7, Operand(kPointerSizeLog2));
224 __ addi(r3, r3, Operand(1));
245 __ cmpi(r3, Operand::Zero());
247 __ subi(r3, r3, Operand(1));
248 __ ShiftLeftImm(r3, r3, Operand(kPointerSizeLog2));
293 __ cmpi(r3, Operand::Zero())
[all...] |
| /external/v8/src/x87/ |
| macro-assembler-x87.h | 37 typedef Operand MemOperand;
63 void Load(Register dst, const Operand& src, Representation r);
64 void Store(Register src, const Operand& dst, Representation r);
74 void Set(const Operand& dst, int32_t x) { mov(dst, Immediate(x)); }
83 void CompareRoot(const Operand& with, Heap::RootListIndex index);
92 void JumpIfRoot(const Operand& with, Heap::RootListIndex index,
106 void JumpIfNotRoot(const Operand& with, Heap::RootListIndex index,
185 // Operand(reg, off).
449 LoadUint32NoSSE2(Operand(src));
451 void LoadUint32NoSSE2(const Operand& src)
[all...] |
| /external/v8/src/ppc/ |
| deoptimizer-ppc.cc | 126 __ subi(sp, sp, Operand(kDoubleRegsSize));
137 __ subi(sp, sp, Operand(kNumberOfRegisters * kPointerSize));
144 __ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
158 __ addi(r7, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
164 __ li(r3, Operand::Zero());
170 __ li(r4, Operand(type())); // bailout type,
174 __ mov(r8, Operand(ExternalReference::isolate_address(isolate())));
205 __ addi(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
215 __ addi(r6, r4, Operand(FrameDescription::frame_content_offset()));
222 __ addi(r6, r6, Operand(kPointerSize))
[all...] |
| codegen-ppc.cc | 89 __ andi(r0, result, Operand(kIsIndirectStringMask));
94 __ andi(ip, result, Operand(kStringRepresentationMask));
95 __ cmpi(ip, Operand(kConsStringTag));
97 __ cmpi(ip, Operand(kThinStringTag));
131 __ andi(r0, result, Operand(kStringRepresentationMask));
137 Operand(SeqTwoByteString::kHeaderSize - kHeapObjectTag));
145 __ andi(r0, result, Operand(kIsIndirectStringMask));
150 __ andi(r0, result, Operand(kShortExternalStringMask));
158 __ andi(r0, result, Operand(kStringEncodingMask));
161 __ ShiftLeftImm(result, index, Operand(1))
[all...] |
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 291 // Operand.
292 Operand::Operand(int64_t immediate)
300 Operand::Operand(Register reg, Shift shift, unsigned shift_amount)
312 Operand::Operand(Register reg, Extend extend, unsigned shift_amount)
326 bool Operand::IsImmediate() const { return reg_.Is(NoReg); }
329 bool Operand::IsPlainRegister() const {
338 // For example, this operand could be replaced with w1
[all...] |
| /tools/dexter/slicer/export/slicer/ |
| code_ir.h | 124 struct Operand : public Node {};
126 struct Const32 : public Operand {
138 struct Const64 : public Operand {
150 struct VReg : public Operand {
158 struct VRegPair : public Operand {
166 struct VRegList : public Operand {
172 struct VRegRange : public Operand {
181 struct IndexedOperand : public Operand {
219 struct CodeLocation : public Operand {
240 std::vector<Operand*> operands
244 T* operand = dynamic_cast<T*>(operands[index]); local
329 T* operand = dynamic_cast<T*>(operands[index]); local
[all...] |
