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  /device/linaro/bootloader/OpenPlatformPkg/Drivers/SdMmc/DwMmcHcDxe/
DwMmcHcDxe.h 25 #include <IndustryStandard/Pci.h>
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  /device/linaro/bootloader/OpenPlatformPkg/Drivers/SdMmc/XenonDxe/
SdMmcPciHcDxe.h 21 #include <IndustryStandard/Pci.h>
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  /device/linaro/bootloader/edk2/DuetPkg/BiosVideoThunkDxe/
BiosVideo.h 40 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/PciIo/
PciIo.h 18 EFI PCI I/O Protocol
28 // Global ID for the PCI I/O Protocol
38 // Prototypes for the PCI I/O Protocol
57 // Complete PCI address generater
69 #define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 // Enable the I/O decode bit in the PCI Config Header
70 #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 // Enable the Memory decode bit in the PCI Config Header
71 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 // Enable the DMA bit in the PCI Config Header
74 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 // Clear for an add-in PCI Device
75 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 // Clear for a physical PCI Option ROM accessed through ROM BAR
76 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 // Clear for PCI controllers that can not genrate a DAC
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  /device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/SataSiI3132Dxe/
SataSiI3132.h 2 * Header containing the structure specific to the Silicon Image I3132 Sata PCI card
30 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/EmulatorPkg/
EmulatorPkg.fdf 170 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
173 INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/
IdeBus.h 42 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/
BiosKeyboard.h 48 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/
BiosVideo.h 44 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/
LegacyBbs.c 17 #include <IndustryStandard/Pci.h>
335 // PCI bus driver enumerate all subsequent handles
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/
IncompatiblePciDeviceSupport.c 2 This module is one template module for Incompatible PCI Device Support protocol.
3 It includes one incompatile pci devices list template.
5 Incompatible PCI Device Support protocol allows the PCI bus driver to support
6 resource allocation for some PCI devices that do not comply with the PCI Specification.
26 #include <IndustryStandard/Pci.h>
61 resource configuration requirements for an incompatible PCI device.
64 @param VendorId A unique ID to identify the manufacturer of the PCI device.
65 @param DeviceId A unique ID to identify the particular PCI device.
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  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/NvmExpressDxe/
NvmExpress.h 22 #include <IndustryStandard/Pci.h>
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  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/
PciRootBridge.h 3 The PCI Root Bridge header file.
21 #include <IndustryStandard/Pci.h>
90 Construct the Pci Root Bridge instance.
223 Enable a PCI driver to read PCI controller registers in the
224 PCI root bridge I/O space.
232 @retval EFI_SUCCESS - The data was read from the PCI root bridge.
250 Enable a PCI driver to write to PCI controller registers in the
251 PCI root bridge I/O space.
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  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/
SdMmcPciHcDxe.h 21 #include <IndustryStandard/Pci.h>
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  /device/linaro/bootloader/edk2/MdeModulePkg/Library/UefiBootManagerLib/
InternalBm.h 21 #include <IndustryStandard/Pci.h>
  /device/linaro/bootloader/edk2/MdeModulePkg/Universal/Network/SnpDxe/
Snp.h 36 #include <IndustryStandard/Pci.h>
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  /device/linaro/bootloader/edk2/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/
PciCfg2.c 2 This driver installs Single Segment Pci Configuration 2 PPI
3 to provide read, write and modify access to Pci configuration space in PEI phase.
4 To follow PI specification, these services also support access to the unaligned Pci address.
24 #include <IndustryStandard/Pci.h>
29 @param Address PCI address with EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.
31 @return PCI address with PCI_LIB_ADDRESS format.
47 Reads from a given location in the PCI configuration space.
80 // Aligned Pci address access
85 // Unaligned Pci address access, break up the request into byte by byte.
93 // Aligned Pci address access
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  /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/
PciIo.h 2 EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
3 and DMA interfaces that a driver uses to access its PCI controller.
20 /// Global ID for the PCI I/O Protocol
51 // Complete PCI address generater
63 #define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
64 #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
65 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
68 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
69 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
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  /device/linaro/bootloader/edk2/OptionRomPkg/CirrusLogic5430Dxe/
CirrusLogic5430.h 43 #include <IndustryStandard/Pci.h>
45 // Cirrus Logic 5430 PCI Configuration Header values
  /device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/
PciHostBridgeLib.c 2 OVMF's instance of the PCI Host Bridge Library.
18 #include <IndustryStandard/Pci.h>
89 PCI bridge hanging off this root bus.
253 Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);
304 // subordinate buses that might exist behind PCI bridges hanging off it.
395 @param Configuration Pointer to PCI I/O and PCI memory resource
  /device/linaro/bootloader/edk2/OvmfPkg/QemuVideoDxe/
Qemu.h 40 #include <IndustryStandard/Pci.h>
44 // QEMU Video PCI Configuration Header values
  /device/linaro/bootloader/edk2/PcAtChipsetPkg/8259InterruptControllerDxe/
8259.c 499 Reads the PCI configuration space to get the interrupt number that is assigned to the card.
502 @param[in] PciHandle PCI function for which to return the vector.
529 PciIo->Pci.Read (
537 // Interrupt line is same location for standard PCI cards, standard
  /device/linaro/bootloader/edk2/QuarkPlatformPkg/Pci/Dxe/PciHostBridge/
PciRootBridge.h 2 The PCI Root Bridge header file.
22 #include <IndustryStandard/Pci.h>
48 // The number of PCI root bridges
114 Construct the Pci Root Bridge Io protocol.
287 Enable a PCI driver to read PCI controller registers in the
288 PCI root bridge I/O space.
300 EFI_SUCCESS - The data was read from the PCI root bridge.
320 Enable a PCI driver to write to PCI controller registers in the
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  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/
Ohci.h 37 #include <IndustryStandard/Pci.h>
  /external/syslinux/efi32/include/efi/
efipciio.h 204 EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;

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1 2 3 4 5 67 8 910