| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| illegal.l | 152 [^:]*:212: Error: .*`bic v0.4s,#255,msl#8'
153 [^:]*:213: Error: .*`bic v0.4s,#512'
154 [^:]*:214: Error: .*`bic v0.4s,#1,lsl#31'
|
| /external/llvm/test/MC/ARM/ |
| diagnostics.s | 654 bic r7, r8, #-2149, #0
655 bic r7, r8, #100, #1
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumb32.s | 151 arit3 bic bics bic.w bics.w
|
| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| armv4-mont.pl | 272 bic $np,$rp,$nhi
|
| /external/boringssl/src/crypto/fipsmodule/sha/asm/ |
| sha1-armv4-large.pl | 341 '&bic ($t0,$d,$b)',
542 bic $Xfer,$Xfer,#15 @ align for 128-bit stores
|
| sha256-armv4.pl | 491 bic $H,$H,#15 @ align for 128-bit stores
|
| /external/libavc/common/armv8/ |
| ih264_deblk_chroma_av8.s | 397 bic v12.16b, v12.16b , v18.16b //final condition
|
| /external/libhevc/common/arm/ |
| ihevc_deblk_luma_horz.s | 83 @ bic r2,r2,#1
|
| ihevc_deblk_luma_vert.s | 85 @ bic r2,r2,#1
|
| ihevc_inter_pred_filters_luma_vert.s | 149 bic r4,r5,#7 @r5 ->wd
601 bic r4,r5,#7 @r5 ->wd
[all...] |
| ihevc_inter_pred_luma_horz_w16out.s | 128 bic r14, #1 @ clearing bit[0], so that it goes back to mode
|
| /external/libhevc/common/arm64/ |
| ihevc_inter_pred_luma_horz_w16out.s | 125 bic x19, x19, x20 // clearing bit[0], so that it goes back to mode
|
| /external/v8/src/arm/ |
| disasm-arm.cc | 999 case BIC: {
1000 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
[all...] |
| macro-assembler-arm.cc | 378 bic(dst, dst, Operand(mask));
394 bic(dst, src, Operand(mask));
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/alpha/ |
| elf-reloc-8.s | 97 bic $1,1,$1
|
| /external/capstone/suite/MC/ARM/ |
| thumb2-narrow-dp.ll.cs | 346 0x21,0xea,0x00,0x00 = bic.w r0, r1, r0
|
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | 73 __ bic(w25, w26, w27);
74 __ bic(x28, x29, x2);
651 __ bic(v26.V16B(), v3.V16B(), v24.V16B());
652 __ bic(v7.V2S(), 0xe4, 16);
653 __ bic(v28.V4H(), 0x23, 8);
654 __ bic(v29.V4S(), 0xac);
655 __ bic(v12.V8B(), v31.V8B(), v21.V8B());
656 __ bic(v18.V8H(), 0x98);
[all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.cc | 301 // Moved to ARM32::AssemblerARM32::bic()
302 void Assembler::bic(Register rd, Register rn, Operand o, Condition cond) {
303 EmitType01(cond, o.type(), BIC, 0, rn, rd, o);
306 // Moved to ARM32::AssemblerARM32::bic()
308 EmitType01(cond, o.type(), BIC, 1, rn, rd, o);
[all...] |
| assembler_arm.h | 503 // Moved to ARM32::IceAssemblerARM32::bic()
504 void bic(Register rd, Register rn, Operand o, Condition cond = AL);
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerARM32.h | 196 void bic(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Resize.S | 165 bic x12, x12, #(1 << (CHUNKSHIFT + 1 + COMPONENT_SHIFT + 1)) - 1
|
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | 654 void bic(const Register& rd, const Register& rn, const Operand& operand);
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 2036 void bic(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2039 void bic(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2042 void bic(EncodingSize size, function in class:vixl::aarch32::Assembler
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 71 void MacroAssembler::Bic(const Register& rd,
76 LogicalMacro(rd, rn, operand, BIC);
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-const-a32.cc | 58 M(bic) \
[all...] |
