| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| bl-local-v4t.d | 14 0+10 <[^>]*> 46c0 nop ; \(mov r8, r8\)
15 0+12 <[^>]*> 46c0 nop ; \(mov r8, r8\)
16 0+14 <[^>]*> 46c0 nop ; \(mov r8, r8\)
|
| blx-bad.d | 16 8: 46c0 nop ; \(mov r8, r8\)
18 e: 46c0 nop ; \(mov r8, r8\)
21 18: 46c0 nop ; \(mov r8, r8\)
24 22: 46c0 nop ; \(mov r8, r8\)
|
| tcompat2.d | 23 0+18 <[^>]*> 46c0 * nop ; \(mov r8, r8\)
24 0+1a <[^>]*> 46c0 * nop ; \(mov r8, r8\)
25 0+1c <[^>]*> 46c0 * nop ; \(mov r8, r8\)
26 0+1e <[^>]*> 46c0 * nop ; \(mov r8, r8\)
|
| thumbv6.d | 20 0+018 <[^>]*> 46c0 * nop[ ]+; \(mov r8, r8\)
21 0+01a <[^>]*> 46c0 * nop[ ]+; \(mov r8, r8\)
22 0+01c <[^>]*> 46c0 * nop[ ]+; \(mov r8, r8\)
23 0+01e <[^>]*> 46c0 * nop[ ]+; \(mov r8, r8\)
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Arm/ |
| ArmLibSupportV7.S | 20 mrc p15,0,R0,c0,c0,5
74 mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
76 mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
84 mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
|
| ArmV7Support.S | 71 mrc p15,0,R0,c1,c0,0
73 mcr p15,0,R0,c1,c0,0
80 mrc p15,0,R0,c1,c0,0
82 mcr p15,0,R0,c1,c0,0 @Disable MMU
91 mrc p15, 0, r0, c1, c0, 0 @ Get control register
95 mcr p15, 0, r0, c1, c0, 0 @ Write control register
101 mrc p15,0,R0,c1,c0,0
107 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
109 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
116 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
[all...] |
| ArmV7Support.asm | 74 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
76 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
82 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
84 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
93 mrc p15, 0, r0, c1, c0, 0 ; Get control register
97 mcr p15, 0, r0, c1, c0, 0 ; Write control register
103 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
109 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
111 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
118 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
[all...] |
| /external/syslinux/core/legacynet/ |
| dnsresolv.c | 102 unsigned int c0, c1; local
105 c0 = p[0];
106 if (c0 >= 0xc0) {
109 p = (const uint8_t *)buf + ((c0 - 0xc0) << 8) + c1;
110 } else if (c0) {
111 c0++; /* Include the length byte */
112 if (memcmp(q, p, c0))
114 q += c0;
115 p += c0;
131 unsigned int c0, c1 local
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
| arithmetic.d | 13 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A1, A0 = ABS A0;
66 80: 0b c4 [0-3][[:xdigit:]] c0 A0 -= A1;
90 c0: 08 c2 a8 25 R6 = R5.H \* R0.L;
96 d8: 1c c2 b0 c0 R3 = R6.H \* R0.H \(M\);
103 e0: 63 c0 2f 02 A0 = R5.L \* R7.H \(W32\);
104 e4: 03 c0 00 04 A0 = R0.H \* R0.L;
105 e8: 83 c0 13 0a A0 \+= R2.L \* R3.H \(FU\);
106 ec: 03 c0 21 0c A0 \+= R4.H \* R1.L;
108 f4: 03 c0 2a 16 A0 -= R5.H \* R2.H;
109 f8: 10 c0 08 58 A1 = R1.L \* R0.H \(M\)
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cris/ |
| diffexp-ovwr.d | 19 00c0 00000000 00000000 00000000 00000000 .*
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| pr12589-1.d | 15 [ ]*[a-f0-9]+: 89 c0 mov %eax,%eax
|
| xsaves-intel.d | 13 [ ]*[a-f0-9]+:[ ]*0f c7 ac f4 c0 1d fe ff[ ]*xsaves \[esp\+esi\*8-0x1e240\]
15 [ ]*[a-f0-9]+:[ ]*0f c7 9c f4 c0 1d fe ff[ ]*xrstors \[esp\+esi\*8-0x1e240\]
17 [ ]*[a-f0-9]+:[ ]*0f c7 ac f4 c0 1d fe ff[ ]*xsaves \[esp\+esi\*8-0x1e240\]
19 [ ]*[a-f0-9]+:[ ]*0f c7 9c f4 c0 1d fe ff[ ]*xrstors \[esp\+esi\*8-0x1e240\]
|
| xsaves.d | 13 [ ]*[a-f0-9]+:[ ]*0f c7 ac f4 c0 1d fe ff[ ]*xsaves -0x1e240\(%esp,%esi,8\)
15 [ ]*[a-f0-9]+:[ ]*0f c7 9c f4 c0 1d fe ff[ ]*xrstors -0x1e240\(%esp,%esi,8\)
17 [ ]*[a-f0-9]+:[ ]*0f c7 ac f4 c0 1d fe ff[ ]*xsaves -0x1e240\(%esp,%esi,8\)
19 [ ]*[a-f0-9]+:[ ]*0f c7 9c f4 c0 1d fe ff[ ]*xrstors -0x1e240\(%esp,%esi,8\)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
| strange.d | 14 0070 04000000 01000000 000000c0 00000400 .*
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/rx/ |
| rdacl.d | 11 6: fd 19 c0 rdacl #1, a1
|
| rdacw.d | 11 6: fd 18 c0 rdacw #1, a1
|
| shll.d | 17 14: fd c0 00 shll #0, r0, r0
18 17: fd c0 0f shll #0, r0, r15
19 1a: fd c0 f0 shll #0, r15, r0
20 1d: fd c0 ff shll #0, r15, r15
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/ |
| ldx_efsr.d | 10 0: c7 08 c0 00 ldx \[ %g3 \], %efsr
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-i386/ |
| load4b.d | 12 [ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
|
| load5b.d | 12 [ ]*[a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+,%eax
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/ |
| fr450-spr.d | 86 .*: c0 0c 01 84 movgs gr4,dcr
87 .*: c0 0c 11 84 movgs gr4,brr
88 .*: c0 0c 21 84 movgs gr4,nmar
89 .*: c0 0c 31 84 movgs gr4,btbr
90 .*: c0 0c 41 84 movgs gr4,ibar0
91 .*: c0 0c 51 84 movgs gr4,ibar1
92 .*: c0 0c 61 84 movgs gr4,ibar2
93 .*: c0 0c 71 84 movgs gr4,ibar3
94 .*: c0 0c 81 84 movgs gr4,dbar0
95 .*: c0 0c 91 84 movgs gr4,dbar
[all...] |
| /external/libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/ |
| assign_move.pass.cpp | 33 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
35 c1 = std::move(c0);
41 assert(c0.empty());
50 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
52 c1 = std::move(c0);
58 assert(!c0.empty());
67 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
69 c1 = std::move(c0);
75 assert(c0.empty());
84 C c0(I(std::begin(t0)), I(std::end(t0)), A(10))
[all...] |
| /prebuilts/ndk/r16/sources/cxx-stl/llvm-libc++/test/std/containers/sequences/forwardlist/forwardlist.cons/ |
| assign_move.pass.cpp | 33 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
35 c1 = std::move(c0);
41 assert(c0.empty());
50 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
52 c1 = std::move(c0);
58 assert(!c0.empty());
67 C c0(I(std::begin(t0)), I(std::end(t0)), A(10));
69 c1 = std::move(c0);
75 assert(c0.empty());
84 C c0(I(std::begin(t0)), I(std::end(t0)), A(10))
[all...] |
| /external/libvpx/libvpx/vpx_dsp/ppc/ |
| transpose_vsx.h | 41 int16x8_t c0, c1, c2, c3, c4, c5, c6, c7; local
62 c0 = vec_mergeh(b0, b4);
72 // c0: 00 20 40 60 01 21 41 61
81 v[0] = vec_mergeh(c0, c4);
82 v[1] = vec_mergel(c0, c4);
|
| /external/llvm/test/MC/ARM/ |
| thumb-only-conditionals.s | 29 mcrne p0, #0, r0, c0, c0, #0
30 mcr2ne p0, #0, r0, c0, c0, #0
32 @ CHECK-NEXT: mcrne p0, #0, r0, c0, c0, #0
33 @ CHECK-NEXT: mcr2ne p0, #0, r0, c0, c0, #0
|
