| /external/tensorflow/tensorflow/core/kernels/ |
| cwise_op_gpu_minimum.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_pow.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_real.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_sin.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_square.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_squared_difference.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
23 } // namespace functor
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| cwise_op_gpu_zeta.cu.cc | 21 namespace functor { namespace in namespace:tensorflow
24 } // namespace functor
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| cwise_op_pow.cc | 19 REGISTER5(BinaryOp, CPU, "Pow", functor::pow, float, Eigen::half, double,
21 REGISTER2(BinaryOp, CPU, "Pow", functor::safe_pow, int32, int64);
24 REGISTER4(BinaryOp, GPU, "Pow", functor::pow, float, Eigen::half, double,
28 REGISTER2(BinaryOp, SYCL, "Pow", functor::pow, float, double);
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| data_format_ops_gpu.cu.cc | 26 template struct functor::DataFormatDimMap<GPUDevice, int32>;
27 template struct functor::DataFormatDimMap<GPUDevice, int64>;
28 template struct functor::DataFormatVecPermute<GPUDevice, int32>;
29 template struct functor::DataFormatVecPermute<GPUDevice, int64>;
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| pad_op_gpu.cu.cc | 30 template struct functor::Pad<GPUDevice, T, Tpadding, 0>; \
31 template struct functor::Pad<GPUDevice, T, Tpadding, 1>; \
32 template struct functor::Pad<GPUDevice, T, Tpadding, 2>; \
33 template struct functor::Pad<GPUDevice, T, Tpadding, 3>; \
34 template struct functor::Pad<GPUDevice, T, Tpadding, 4>; \
35 template struct functor::Pad<GPUDevice, T, Tpadding, 5>; \
36 template struct functor::Pad<GPUDevice, T, Tpadding, 6>;
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| slice_op_gpu.cu.cc | 31 template struct functor::Slice<GPUDevice, T, 1>; \
32 template struct functor::Slice<GPUDevice, T, 2>; \
33 template struct functor::Slice<GPUDevice, T, 3>; \
34 template struct functor::Slice<GPUDevice, T, 4>; \
35 template struct functor::Slice<GPUDevice, T, 5>; \
36 template struct functor::Slice<GPUDevice, T, 6>; \
37 template struct functor::Slice<GPUDevice, T, 7>;
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| cwise_op_tanh.cc | 20 REGISTER5(UnaryOp, CPU, "Tanh", functor::tanh, float, Eigen::half, double,
24 REGISTER3(UnaryOp, GPU, "Tanh", functor::tanh, float, Eigen::half, double);
28 REGISTER2(UnaryOp, SYCL, "Tanh", functor::tanh, float, double);
31 REGISTER5(SimpleBinaryOp, CPU, "TanhGrad", functor::tanh_grad, float,
34 REGISTER3(SimpleBinaryOp, GPU, "TanhGrad", functor::tanh_grad, float,
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| cwise_op_mod.cc | 19 REGISTER2(BinaryOp, CPU, "Mod", functor::safe_mod, int32, int64);
20 REGISTER2(BinaryOp, CPU, "Mod", functor::fmod, float, double);
21 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::safe_mod, int32, int64);
22 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::fmod, float, double);
34 BinaryOp<CPUDevice, functor::safe_mod<int32>>);
41 BinaryOp<CPUDevice, functor::safe_mod<int32>>);
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| cwise_op_rsqrt.cc | 19 REGISTER5(UnaryOp, CPU, "Rsqrt", functor::rsqrt, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Rsqrt", functor::rsqrt, float, Eigen::half, double);
26 REGISTER2(UnaryOp, SYCL, "Rsqrt", functor::rsqrt, float, double);
29 REGISTER5(SimpleBinaryOp, CPU, "RsqrtGrad", functor::rsqrt_grad, float,
32 REGISTER3(SimpleBinaryOp, GPU, "RsqrtGrad", functor::rsqrt_grad, float,
36 REGISTER2(SimpleBinaryOp, SYCL, "RsqrtGrad", functor::rsqrt_grad, float,
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| cwise_op_sigmoid.cc | 20 REGISTER5(UnaryOp, CPU, "Sigmoid", functor::sigmoid, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Sigmoid", functor::sigmoid, float, Eigen::half,
27 REGISTER(UnaryOp, SYCL, "Sigmoid", functor::sigmoid, float);
30 REGISTER5(SimpleBinaryOp, CPU, "SigmoidGrad", functor::sigmoid_grad, float,
33 REGISTER3(SimpleBinaryOp, GPU, "SigmoidGrad", functor::sigmoid_grad, float,
37 REGISTER(SimpleBinaryOp, SYCL, "SigmoidGrad", functor::sigmoid_grad, float);
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| cwise_op_sqrt.cc | 19 REGISTER5(UnaryOp, CPU, "Sqrt", functor::sqrt, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Sqrt", functor::sqrt, float, Eigen::half, double);
27 REGISTER2(UnaryOp, SYCL, "Sqrt", functor::sqrt, float, double);
30 REGISTER5(SimpleBinaryOp, CPU, "SqrtGrad", functor::sqrt_grad, float,
33 REGISTER3(SimpleBinaryOp, GPU, "SqrtGrad", functor::sqrt_grad, float,
38 REGISTER2(SimpleBinaryOp, SYCL, "SqrtGrad", functor::sqrt_grad, float, double);
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| colorspace_op_gpu.cu.cc | 28 template class functor::RGBToHSV<GPUDevice, T>; \
29 template class functor::HSVToRGB<GPUDevice, T>;
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| cwise_op_digamma.cc | 19 REGISTER3(UnaryOp, CPU, "Digamma", functor::digamma, float, Eigen::half,
22 REGISTER3(UnaryOp, GPU, "Digamma", functor::digamma, float, Eigen::half,
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| cwise_op_erf.cc | 19 REGISTER3(UnaryOp, CPU, "Erf", functor::erf, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Erf", functor::erf, float, Eigen::half, double);
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| cwise_op_erfc.cc | 19 REGISTER3(UnaryOp, CPU, "Erfc", functor::erfc, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Erfc", functor::erfc, float, Eigen::half, double);
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| cwise_op_lgamma.cc | 19 REGISTER3(UnaryOp, CPU, "Lgamma", functor::lgamma, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Lgamma", functor::lgamma, float, Eigen::half, double);
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| cwise_op_logical_and.cc | 20 BinaryOp<CPUDevice, functor::logical_and>);
23 BinaryOp<GPUDevice, functor::logical_and>);
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| cwise_op_logical_not.cc | 20 UnaryOp<CPUDevice, functor::logical_not>);
23 UnaryOp<GPUDevice, functor::logical_not>);
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| cwise_op_logical_or.cc | 20 BinaryOp<CPUDevice, functor::logical_or>);
23 BinaryOp<GPUDevice, functor::logical_or>);
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| cwise_op_not_equal_to_1.cc | 19 REGISTER6(BinaryOp, CPU, "NotEqual", functor::not_equal_to, float, Eigen::half,
22 REGISTER4(BinaryOp, GPU, "NotEqual", functor::not_equal_to, float, Eigen::half,
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