| /dalvik/dx/src/com/android/dx/rop/code/ |
| BasicBlockList.java | 134 InsnList insns = one.getInsns(); local
135 int insnsSz = insns.size();
138 Insn insn = insns.get(j);
178 InsnList insns = one.getInsns(); local
179 insns.forEach(visitor);
|
| /art/libdexfile/dex/ |
| code_item_accessors_test.cc | 75 const uint16_t* insns) {
79 EXPECT_EQ(insns_accessor.Insns(), insns);
84 EXPECT_EQ(data_accessor.Insns(), insns);
|
| /dalvik/dexgen/src/com/android/dexgen/dex/file/ |
| DebugInfoItem.java | 177 DalvInsnList insns = code.getInsns(); local
178 int codeSize = insns.codeSize();
179 int regSize = insns.getRegistersSize();
|
| CodeItem.java | 168 DalvInsnList insns = code.getInsns(); local
173 insns.debugPrint(out, prefix, verbose);
197 * In order to get the catches and insns, all the code's
298 DalvInsnList insns = code.getInsns(); local
301 insns.writeTo(out);
|
| /dalvik/dx/src/com/android/dx/dex/file/ |
| DebugInfoItem.java | 174 DalvInsnList insns = code.getInsns(); local
175 int codeSize = insns.codeSize();
176 int regSize = insns.getRegistersSize();
|
| CodeItem.java | 160 DalvInsnList insns = code.getInsns(); local
165 insns.debugPrint(out, prefix, verbose);
189 * In order to get the catches and insns, all the code's
291 DalvInsnList insns = code.getInsns(); local
294 insns.writeTo(out);
|
| /dalvik/dx/src/com/android/dx/ssa/back/ |
| SsaToRop.java | 144 ArrayList<SsaInsn> insns = b.getInsns();
146 if ((insns.size() == 1)
147 && (insns.get(0).getOpcode() == Rops.GOTO)) {
173 // Delete the phi insns.
178 * After all move insns have been added, sort them so they don't
188 * adding move instructions to predecessors based on phi insns.
270 "Exit block must have no insns when leaving SSA form");
284 ArrayList<SsaInsn> insns = b.getInsns(); local
285 SsaInsn lastInsn = insns.get(insns.size() - 1)
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| neon-logic.d | 1 # name: Neon logic insns with two and three operands including imm. values
|
| group-reloc-alu.s | 30 @ The following should cause the insns to be switched to SUB(S).
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| avx512f-nondef.d | 3 #name: i386 AVX512F insns with nondefault values in ignored bits
|
| x86-64-avx512f-nondef.d | 3 #name: x86-64 AVX512F insns with nondefault values in ignored bits
|
| x86-64-long-1-intel.d | 2 #name: x86-64 long insns (Intel disassembly)
|
| x86-64-rtm-intel.d | 2 #name: x86-64 RTM insns (Intel disassembly)
|
| x86-64-xsaves-intel.d | 3 #name: x86_64 XSAVES insns (Intel disassembly)
|
| x86-64-xsaves.d | 3 #name: x86_64 XSAVES insns
|
| xsaves-intel.d | 3 #name: i386 XSAVES insns (Intel disassembly)
|
| xsaves.d | 3 #name: i386 XSAVES insns
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68hc11/ |
| insns12.s | 1 # Test for correct generation of 68HC12 specific insns.
5 ;; Test the call insns
|
| insns.s | 1 # Test for correct generation of 68HC11 insns.
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
| cpu32.s | 1 # cpu32 specific insns
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/xgate/ |
| hilo.d | 5 # Test for correct generation of XGATE insns when using the %hi and %lo modifiers.
|
| /dalvik/dx/src/com/android/dx/cf/code/ |
| RopperMachine.java | 85 private final ArrayList<Insn> insns; field in class:RopperMachine
157 this.insns = new ArrayList<Insn>(25);
175 return insns;
198 * {@link #insns} list, set {@link #catches}, reset whether it has
205 insns.clear();
353 insns.add(new PlainInsn(Rops.opMove(type), pos, scratch, src));
362 insns.add(new PlainInsn(Rops.opMove(type), pos,
392 insns.add(insn);
397 insns.add(insn);
439 insns.add(insn)
[all...] |
| /external/capstone/bindings/ocaml/ |
| test_mips.ml | 65 let insns = cs_disasm handle code 0x1000L 0L in
68 List.iter (print_insn handle) insns;
|
| test_xcore.ml | 68 let insns = cs_disasm handle code 0x1000L 0L in
71 List.iter (print_insn handle) insns;
|
| /external/mesa3d/src/intel/tools/ |
| aubinator.c | 323 struct brw_instruction *insns; local
346 insns = (struct brw_instruction *) (gtt + start);
347 gen_disasm_disassemble(disasm, insns, 0, stdout);
429 struct brw_instruction *insns; local
444 insns = (struct brw_instruction *) (gtt + instruction_base + start);
445 gen_disasm_disassemble(disasm, insns, 0, stdout);
453 struct brw_instruction *insns; local
468 insns = (struct brw_instruction *) (gtt + instruction_base + start);
469 gen_disasm_disassemble(disasm, insns, 0, stdout);
501 struct brw_instruction *insns; local
[all...] |
