| /external/v8/src/mips/ |
| disasm-mips.cc | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| micromips@mips32-dsp.d | 141 0+0202 <[^>]*> 018b 8abc madd \$ac2,t3,t4
|
| mips32-dsp.d | 139 0+0204 <[^>]*> 716c1000 madd \$ac2,t3,t4
|
| mipsr6@mips32-dsp.d | 141 0+0204 <[^>]*> 716c1000 madd \$ac2,t3,t4
|
| r6-removed.l | 137 .*:138: Error: opcode not supported on this processor: .* \(.*\) `madd \$2,\$3'
139 .*:140: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f5,\$f6,\$f7,\$f8'
140 .*:141: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f6,\$f8,\$f10,\$f12'
141 .*:142: Error: opcode not supported on this processor: .* \(.*\) `madd.ps \$f6,\$f8,\$f10,\$f12'
|
| micromips.s | 1260 madd $4,$5
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_sao_edge_offset_class2_chroma.s | 118 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
219 madd x12, x11, x1, x10 //wd - 2 + (ht - 1) * src_strd
[all...] |
| ihevc_sao_edge_offset_class3_chroma.s | 115 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
212 madd x12, x11, x1, x0 //pu1_src[(ht - 1) * src_strd]
[all...] |
| /external/valgrind/VEX/priv/ |
| host_s390_defs.h | 578 } madd; member in union:__anon41880::__anon41881
|
| host_s390_defs.c | 805 s390_amode_get_reg_usage(u, insn->variant.madd.dst);
[all...] |
| /external/llvm/test/MC/Mips/mips32r2/ |
| invalid-dsp.s | 44 madd $ac2,$sp,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-dspr2.s | 62 madd $ac2,$sp,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mep/ |
| dj1.be.d | [all...] |
| dj1.le.d | [all...] |
| /external/capstone/suite/MC/AArch64/ |
| basic-a64-instructions.s.cs | 598 0x61,0x10,0x07,0x1b = madd w1, w3, w7, w4
599 0x1f,0x2c,0x09,0x1b = madd wzr, w0, w9, w11
600 0xed,0x13,0x04,0x1b = madd w13, wzr, w4, w4
601 0xd3,0x77,0x1f,0x1b = madd w19, w30, wzr, w29
603 0x61,0x10,0x07,0x9b = madd x1, x3, x7, x4
604 0x1f,0x2c,0x09,0x9b = madd xzr, x0, x9, x11
605 0xed,0x13,0x04,0x9b = madd x13, xzr, x4, x4
606 0xd3,0x77,0x1f,0x9b = madd x19, x30, xzr, x29
[all...] |
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | [all...] |
| /external/llvm/test/MC/Mips/ |
| target-soft-float.s | 276 madd.s $f2, $f2, $f2, $f2
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Resize.S | 374 madd x8, x13, x9, x8
|
| rsCpuIntrinsics_advsimd_Blur.S | [all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 937 void MacroAssembler::Madd(const Register& rd,
943 madd(rd, rn, rm, ra);
[all...] |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | 1438 void Assembler::madd(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | [all...] |
| /external/libavc/common/armv8/ |
| ih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s | 146 madd x7, x7, x6, x9
[all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | 524 TEST(madd) {
527 COMPARE(madd(w0, w1, w2, w3), "madd w0, w1, w2, w3");
528 COMPARE(madd(w30, w21, w22, w16), "madd w30, w21, w22, w16");
529 COMPARE(madd(x0, x1, x2, x3), "madd x0, x1, x2, x3");
530 COMPARE(madd(x30, x21, x22, x16), "madd x30, x21, x22, x16");
[all...] |
