| /external/capstone/suite/MC/Mips/ |
| mips-dsp-instructions.s.cs | 26 0x70,0xc7,0x08,0x00 = madd $ac1, $6, $7
36 0x70,0xc7,0x00,0x00 = madd $6, $7
|
| mips64-alu-instructions.s.cs | 40 0x00,0x00,0xc7,0x70 = madd $6, $7
|
| /external/clang/test/SemaCXX/ |
| vector-casts.cpp | 61 void madd(const testvec& rhs) { function in struct:testvec
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32.s | 10 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips64.s | 15 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64r2.s | 18 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| micromips@mips4-fp.d | 24 [0-9a-f]+ <[^>]*> 54c4 0089 madd\.d \$f0,\$f2,\$f4,\$f6
25 [0-9a-f]+ <[^>]*> 5402 5201 madd\.s \$f10,\$f8,\$f2,\$f0
|
| mips32.s | 14 madd $5, $6
|
| loongson-2e.s | 24 madd.s $f0, $f1, $f2
25 madd.d $f3, $f4, $f5
26 madd.ps $f6, $f7, $f8
|
| loongson-2f.s | 24 madd.s $f0, $f1, $f2
25 madd.d $f3, $f4, $f5
26 madd.ps $f6, $f7, $f8
|
| mips32-dspr2.s | 25 madd $ac2,$11,$12
|
| micromips@mips32.d | 13 [0-9a-f]+ <[^>]*> 00c5 cb3c madd a1,a2
|
| mips4-fp.l | 9 .*:11: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
10 .*:13: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
|
| r6-removed.s | 138 madd $2,$3
140 madd.s $f5,$f6,$f7,$f8
141 madd.d $f6,$f8,$f10,$f12
142 madd.ps $f6,$f8,$f10,$f12
|
| r5900-full.d | 72 [0-9a-f]+ <[^>]*> 4600f81c madd\.s \$f0,\$f31,\$f0
73 [0-9a-f]+ <[^>]*> 461f07dc madd\.s \$f31,\$f0,\$f31
358 [0-9a-f]+ <[^>]*> 701f0000 madd \$0,\$31
359 [0-9a-f]+ <[^>]*> 73e0f800 madd \$31,\$31,\$0
360 [0-9a-f]+ <[^>]*> 701f0000 madd \$0,\$31
361 [0-9a-f]+ <[^>]*> 73e00000 madd \$31,\$0
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-aarch64/ |
| erratum843419.s | 47 madd x5, x2, x3, x6
|
| erratum843419.d | 51 300001c: 9b031845 madd x5, x2, x3, x6
|
| /external/eigen/Eigen/src/Core/products/ |
| GeneralBlockPanelKernel.h | 435 EIGEN_STRONG_INLINE void madd(const LhsPacketType& a, const RhsPacketType& b, AccPacketType& c, AccPacketType& tmp) const function in class:Eigen::internal::gebp_traits
537 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp) const function in class:Eigen::internal::gebp_traits
701 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, DoublePacketType& c, RhsPacket& /*tmp*/) const function in class:Eigen::internal::gebp_traits
707 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, ResPacket& c, RhsPacket& /*tmp*/) const function in class:Eigen::internal::gebp_traits
821 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp) const function in class:Eigen::internal::gebp_traits
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| no-aliases.d | 15 18: 1b020c20 madd w0, w1, w2, w3
16 1c: 1b027c20 madd w0, w1, w2, wzr
17 20: 1b027c20 madd w0, w1, w2, wzr
|
| alias.s | 32 madd w0, w1, w2, w3
33 madd w0, w1, w2, wzr
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 17 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 22 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 23 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
25 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
26 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| x86-64-mpx-branch-2.d | 1 #as: -J -madd-bnd-prefix
|
| /external/llvm/test/MC/Mips/ |
| micromips-fpu-instructions.s | 66 # CHECK-EL: madd.s $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x01,0x11]
67 # CHECK-EL: madd.d $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x09,0x11]
131 # CHECK-EB: madd.s $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x01]
132 # CHECK-EB: madd.d $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x09]
192 madd.s $f2, $f4, $f6, $f8
193 madd.d $f2, $f4, $f6, $f8
|
