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Searched
refs:mips
(Results
76 - 100
of
1554
) sorted by null
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>>
/toolchain/binutils/binutils-2.27/ld/testsuite/ld-vxworks/
plt-mips1.d
1
# target:
mips
*-*-*
/external/capstone/arch/Mips/
MipsInstPrinter.c
1
//===-- MipsInstPrinter.cpp - Convert
Mips
MCInst to assembly syntax ------===//
10
// This class prints an
Mips
MCInst to a .s file.
41
//
Mips
Condition Codes
96
MI->flat_insn->detail->
mips
.operands[MI->flat_insn->detail->
mips
.op_count].type = MIPS_OP_MEM;
97
MI->flat_insn->detail->
mips
.operands[MI->flat_insn->detail->
mips
.op_count].mem.base = MIPS_REG_INVALID;
98
MI->flat_insn->detail->
mips
.operands[MI->flat_insn->detail->
mips
.op_count].mem.disp = 0;
101
MI->flat_insn->detail->
mips
.op_count++
[
all
...]
/art/compiler/optimizing/
instruction_simplifier_mips.h
28
namespace
mips
{
namespace in namespace:art
44
} // namespace
mips
pc_relative_fixups_mips.h
27
namespace
mips
{
namespace in namespace:art
43
} // namespace
mips
/device/generic/qemu/
qemu_mips.mk
17
prebuilts/qemu-kernel/
mips
/3.18/kernel-qemu2:kernel-ranchu
25
PRODUCT_MODEL := Minimal Android for QEMU/
MIPS
/external/libunwind/src/mips/
unwind_i.h
30
#include <libunwind-
mips
.h>
/external/llvm/lib/Target/Mips/TargetInfo/
MipsTargetInfo.cpp
1
//===-- MipsTargetInfo.cpp -
Mips
Target Implementation -------------------===//
10
#include "
Mips
.h"
19
RegisterTarget<Triple::
mips
,
20
/*HasJIT=*/true> X(TheMipsTarget, "
mips
", "
Mips
");
/external/llvm/test/MC/Mips/
reloc-directive-bad.s
1
# RUN: not llvm-mc -triple
mips
-unknown-linux < %s -show-encoding -target-abi=o32 \
reloc-directive-negative.s
1
# RUN: not llvm-mc -triple
mips
-unknown-linux < %s -show-encoding -target-abi=o32 \
module-softfloat.s
1
# RUN: llvm-mc %s -arch=
mips
-mcpu=mips32 | \
4
# RUN: llvm-mc %s -arch=
mips
-mcpu=mips32 -filetype=obj -o - | \
5
# RUN: llvm-readobj -
mips
-abi-flags - | \
10
# Check if the
MIPS
.abiflags section was correctly emitted:
11
# CHECK-OBJ:
MIPS
ABI Flags {
asciiz-directive-bad.s
1
# RUN: not llvm-mc -triple
mips
-unknown-linux %s 2>&1 | FileCheck %s
cprestore-warning-unused.s
1
# RUN: llvm-mc %s -arch=
mips
-mcpu=mips32 --position-independent 2>%t1
/external/swiftshader/third_party/LLVM/lib/Target/Mips/TargetInfo/
MipsTargetInfo.cpp
1
//===-- MipsTargetInfo.cpp -
Mips
Target Implementation -------------------===//
10
#include "
Mips
.h"
19
RegisterTarget<Triple::
mips
,
20
/*HasJIT=*/true> X(TheMipsTarget, "
mips
", "
Mips
");
/prebuilts/go/darwin-x86/src/runtime/internal/sys/
zgoarch_mips.go
3
// +build
mips
7
const GOARCH = `
mips
`
/prebuilts/go/linux-x86/src/runtime/internal/sys/
zgoarch_mips.go
3
// +build
mips
7
const GOARCH = `
mips
`
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/
itbl.s
6
; Call
mips
coprocessor "cofun"s as defined in "itbl".
14
; Call a
mips
coprocessor instruction with register "d1"
/toolchain/binutils/binutils-2.27/ld/testsuite/ld-mips-elf/
branch-misc-1.d
1
#name:
MIPS
branch-misc-1
2
#source: ../../../gas/testsuite/gas/
mips
/branch-misc-1.s
6
.*: file format elf.*
mips
.*
mips16-and-micromips.d
2
#source: ../../../gas/testsuite/gas/
mips
/nop.s -mips16
3
#source: ../../../gas/testsuite/gas/
mips
/nop.s -mmicromips
reloc-3-n32.d
2
#source: ../../../gas/testsuite/gas/
mips
/elf-rel6.s
8
.*: file format elf.*
mips
.*
reloc-3.d
2
#source: ../../../gas/testsuite/gas/
mips
/elf-rel6.s
6
.*: file format elf.*
mips
.*
/build/make/target/board/generic_mips64/
BoardConfig.mk
31
TARGET_2ND_ARCH :=
mips
42
TARGET_2ND_CPU_ABI :=
mips
/external/llvm/
llvm.mk
9
LLVM_SUPPORTED_ARCH := arm arm64
mips
mips64 x86 x86_64
/external/llvm/test/MC/Mips/mips32r5/
invalid-mips32.s
3
# RUN: not llvm-mc %s -triple=
mips
-unknown-linux -show-encoding -mcpu=mips32 \
invalid-mips32r2.s
3
# RUN: not llvm-mc %s -triple=
mips
-unknown-linux -show-encoding -mcpu=mips32r2 \
invalid-mips32r3.s
3
# RUN: not llvm-mc %s -triple=
mips
-unknown-linux -show-encoding -mcpu=mips32r3 \
Completed in 838 milliseconds
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